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STD45NF75
N-channel 75 V, 0.018 40 A DPAK
,
STripFETTM II Power MOSFET

Features
Type VDSS RDS(on) max ID
STD45NF75 75 V < 0.024 40 A(1)
1. Current limited by package
3
100% avalanche tested
1
Gate charge minimized
DPAK
Application
Switching applications

Description
This Power MOSFET is the latest development of
Figure 1. Internal schematic diagram
STMicroelectronics's unique "single feature size"
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a
remarkable manufacturing reproducibility.




Table 1. Device summary
Order code Marking Package Packaging

STD45NF75T4 D45NF75 DPAK Tape and reel




May 2009 Doc ID 9902 Rev 5 1/16
www.st.com 16
Contents STD45NF75


Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6

3 Spice thermal model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15




2/16 Doc ID 9902 Rev 5
STD45NF75 Electrical ratings


1 Electrical ratings


Table 2. Absolute maximum ratings
Symbol Parameter Value Unit

VDS Drain-source voltage (VGS = 0) 75 V
VDGR Drain-gate voltage (RGS = 20 k) 75 V
VGS Gate- source voltage