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DISCRETE SEMICONDUCTORS




DATA SHEET
dbook, halfpage




MBD128




BF1102; BF1102R
Dual N-channel dual gate
MOS-FETs
Product specification 2000 Apr 11
Supersedes data of 1999 Jul 01
NXP Semiconductors Product specification


Dual N-channel dual gate MOS-FETs BF1102; BF1102R

FEATURES PINNING - SOT363
Two low noise gain controlled amplifiers in a single DESCRIPTION
package PIN
BF1102 BF1102R
Specially designed for 5 V applications
1 gate 1 (1) gate 1 (1)
Superior cross-modulation performance during AGC
2 gate 2 (1 and 2) source (1 and 2)
High forward transfer admittance
3 drain (1) drain (1)
High forward transfer admittance to input capacitance
ratio. 4 drain (2) drain (2)
5 source (1 and 2) gate 2 (1 and 2)

APPLICATIONS 6 gate 1 (2) gate 1 (2)

Gain controlled low noise amplifier for VHF and UHF
applications such as television tuners and professional handbook, halfpage g2 (1, 2)
communications equipment.

6 5 4
DESCRIPTION
g1 (1) AMP1 d (1)
The BF1102 and BF1102R are both two equal dual gate
MOS-FETs which have a shared source pin and a shared
gate 2 pin. Both devices have interconnected source and
substrate; an internal bias circuit enables DC stabilization g1 (2) AMP2 d (2)
and a very good cross-modulation performance at 5 V 1 2 3
supply voltage; integrated diodes between the gates and BF1102 marking code: W1.
source protect against excessive input voltage surges. BF1102R marking code: W2-.
s (1, 2) MBL029
Both devices have a SOT363 micro-miniature plastic
package. Fig.1 Simplified outline and symbol.


QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Per MOS-FET unless otherwise specified
VDS drain-source voltage 7 V
ID drain current (DC) 40 mA
Ptot total power dissipation Ts 102 C; note 1 200 mW
yfs forward transfer admittance ID = 15 mA 36 43 mS
Cig1-s input capacitance at gate 1 ID = 15 mA 2.8 3.6 pF
Crss reverse transfer capacitance f = 1 MHz 30 50 fF
F noise figure f = 800 MHz 2 2.8 dB
Xmod cross-modulation input level for k = 1% at 40 dB AGC 100 dBV
Tj operating junction temperature 150 C

Note
1. Ts is the temperature at the soldering point of the source lead.


CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling.

2000 Apr 11 2
NXP Semiconductors Product specification


Dual N-channel dual gate MOS-FETs BF1102; BF1102R

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per MOS-FET unless otherwise specified
VDS drain-source voltage 7 V
ID drain current (DC) 40 mA
IG1 gate 1 current 10 mA
IG2 gate 2 current 10 mA
Ptot total power dissipation Ts 102 C 200 mW
Tstg storage temperature 65 +150 C
Tj operating junction temperature 150 C


THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT
Rth j-s thermal resistance from junction to soldering point 240 K/W




MGS359
250
handbook, halfpage
Ptot
(mW)
200



150



100



50



0
0 50 100 150 200
Ts (