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FOR MESSRS: DATE : Oct. 8th ,2012
CUSTOMER'S ACCEPTANCE SPECIFICATIONS
TX38D18VM2BAA
Contents
No. ITEM SHEET No. PAGE
1 COVER 7B64PS 2701-TX38D18VM2BAA-1 1-1/1
2 RECORD OF REVISION 7B64PS 2702-TX38D18VM2BAA-1 2-1/1
3 GENERAL DATA 7B64PS 2703-TX38D18VM2BAA-1 3-1/1
4 ABSOLUTE MAXIMUM RATINGS 7B64PS 2704-TX38D18VM2BAA-1 4-1/1
5 ELECTRICAL CHARACTERISTICS 7B64PS 2705-TX38D18VM2BAA-1 5-1/2~2/2
6 OPTICAL CHARACTERISTICS 7B64PS 2706-TX38D18VM2BAA-1 6-1/2~2/2
7 BLOCK DIAGRAM 7B64PS 2707-TX38D18VM2BAA-1 7-1/1
8 RELIABILITY TESTS 7B64PS 2708-TX38D18VM2BAA-1 8-1/1
9 LCD INTERFACE 7B64PS 2709-TX38D18VM2BAA-1 9-1/8~8/8
10 OUTLINE DIMENSIONS 7B64PS 2710-TX38D18VM2BAA-1 10-1/2~2/2
11 APPEARANCE STANDARD 7B64PS 2711-TX38D18VM2BAA-1 11-1/3~3/3
12 PRECAUTIONS 7B64PS 2712-TX38D18VM2BAA-1 12-1/1~2/2
13 DESIGNATION OF LOT MARK 7B64PS 2713-TX38D18VM2BAA-1 13-1/1
ACCEPTED BY: PROPOSED BY:
SHEET
KAOHSIUNG OPTO-ELECTRONICS INC. NO. 7B64PS 2701-TX38D18VM2BAA-1 PAGE 1-1/1
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2. RECORD OF REVISION
DATE SHEET No. SUMMARY
SHEET
KAOHSIUNG OPTO-ELECTRONICS INC. NO. 7B64PS 2702-TX38D18VM2BAA-1 PAGE 2-1/1
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3. GENERAL DATA
3.1 DISPLAY FEATURES
This module is a 15" XGA of 4:3 format amorphous silicon TFT. The pixel format is vertical stripe and
sub pixels are arranged as R (red), G (green), B (blue) sequentially. This display is RoHS compliant,
COF (chip on film) technology and LED backlight are applied on this display.
Part Name TX38D18VM2BAA
Module Dimensions 326.5(W) mm x 253.5(V) mm x 11.5 (D) mm
LCD Active Area 304.1(H) mm x 228.1(V) mm
Pixel Pitch 0.297(W) mm x 0.297 (H) mm
Resolution 1024 x 3(RGB)(W) x 768(H) dots
Color Pixel Arrangement R, G, B Vertical stripe
LCD Type Transmissive Color TFT; Normally White; Anti-Glare Polarizer
Display Type Active Matrix
Number of Colors 16.7M / 262k Colors
Backlight 39 LEDs (13 series x 3)
Weight (850g)
Interface 1ch - LVDS / Receiver; 20 pins
Power Supply Voltage 3.3V for LCD; 12V and 5V for Backlight
Power Consumption (1.7W) for LCD; (13.2 W) for Backlight
Viewing Direction 12 O'clock (without image inversion and least brightness change)
SHEET
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4. ABSOLUTE MAXIMUM RATINGS
Item Symbol Min. Max. Unit Remarks
Supply Voltage VDD -0.3 4 V -
Input Voltage of Logic VI -0.2 VDD+0.3 V Note 1
$
Operating Temperature Top -30 80 C Note 2
$
Storage Temperature Tst -30 80 C Note 2
Backlight Input Voltage VLED 10 30 V -
Input Voltage of backlight control VLEDC 0 6.0 V Note 3
Note 1: The rating is defined for the signal voltages of the interface such as DE, DCLK, FRC and pixel
data signal.
Note 2: The maximum rating is defined as above based on the temperature on the panel surface and
LED driver board, which might be different from ambient temperature after assembling the
panel into the application. Moreover, some temperature-related phenomenon as below needed
to be noticed:
- Background color, contrast and response time would be different in temperatures other than
25 $ C .
- Operating under high temperature will shorten LED lifetime.
- Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to
such conditions may adversely impact product reliability and result in failures not covered by
warranty.
Note 3: The Backlight control signal voltage of the interface such as EN,DDIM and ADIM signal.
SHEET
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5. ELECTRICAL CHARACTERISTICS
5.1 LCD CHARACTERISTICS Ta 25 $C , VSS 0V
Item Symbol Condition Min. Typ. Max. Unit Remarks
Power Supply Voltage VDD - 3.0 3.3 3.6 V -
Ripple Voltage VRP - - - 100 mVp-p
Rush Current IRUSH - - - 2.0 A Note 1
Differential Input VIH - - +100
Voltage for LVDS VI mV Note 2
Receiver Threshold VIL -100 - -
White Pattern - 410 510
Power Supply Current IDD mA Note 3,4
Black Pattern - 590 690
DCLK Frequency f CLK - - 65 80 MHz -
Note 1: Rush current is set maximum 2A. Current capacity for VDD power supply should be larger than
5A, so that fuse built in the LCM could appropriately work under the abnormal condition.
Note 2: VCM=+1.2V
The input terminal of LVDS transmitter is terminated with 100.
IN+
LVDS
100
IN- Receiver
Note 3: fCLK=65.0MHz, and VDD=3.3V, are the test conditions.
DC Ampere Meter
IDD TFT-LCM
VDD
VDD
VSS
Note 4: For LVDS Transmitter Input
SHEET
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5.2 BACKLIGHT CHARACTERISTICS Ta 25 $C
Item Symbol Condition Min. Typ. Max. Unit Remarks
LED Input Voltage VLED 10.8 12.0 13.2 Note 1
Enable EN 4.5 5 5.5 -
Backlight Unit
Analog Dimming
ADIM 0 5 5.5 V
Function
Digital Dimming "H" Level 4.0 5 5.5
DDIM
Function "L" Level 0 0 0.2
Note 2,3
ADIM = 0V,
- (1100) -
LED Driving Current DDIM = 0% Duty
ILED mA
(DIM Control) ADIM = 5V,
- (55) -
DDIM = 100% Duty
LED Lifetime - 110mA x 3 - (50k) - hrs Note 4
Note 1: As Fig 5.1 shown, all LEDs are controlled by the LED Driver when applying 12V VLED.
Note 2: Dimming function can be obtained by applying DC voltage or PWM signal from the display
interface CN2. The recommend PWM signal is 1KHz~10KHz with 5V amplitude. The
brightness is increased when applied DC voltage of ADIM or PWM duty of DDIM is decreased.
Note 3: 4A fuse is built in the LED voltage control board, current capacity for VLED power supply should
be larger than 10A, so that the fuse built in the LED voltage control board could appropriately
work under the abnormal condition.
Note 4: The estimated lifetime is specified as the time to reduce 50% brightness by applying 110mA x 3
at 25 $ C .
Note 5: ILED vs DIM Voltage (Reference only)
SHEET
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6. OPTICAL CHARACTERISTICS
The optical characteristics are measured based on the conditions as below:
- Supplying the signals and voltages defined in the section of electrical characteristics.
- The backlight unit needs to be turned on for 30 minutes.
- The ambient temperature is 25 $ C .
- In the dark room around 100~200 lx, the equipment has been set for the measurements as shown in
Fig 6.1.
Ta 25 $C , VDD 3.3V
Item Symbol Condition Min. Typ. Max. Unit Remarks
2
Brightness of White - (960) 1200 - cd/m Note 1
I 0$ ,T 0$ ,
Brightness Uniformity - (70) 80 - % Note 2
110mA x 3
Contrast Ratio CR (450) 700 - - Note 3
Response Time
(Rising + Falling) Tr Tf I 0$ ,T 0$ - 25 35 ms Note 4
Tx I 0$ , CR t 10 (70) 80 -
$
T xc I 180 , CR t 10 (70) 80 -
Viewing Angle $
Degree Note 5
Ty I 90 , CR t 10 (60) 70 -
T yc I 270$ , CR t 10 (70) 80 -
X (0.57) 0.62 (0.67)
Red
Y (0.30) 0.35 (0.40)
X (0.29) 0.34 (0.39)
Green
Color Y (0.55) 0.60 (0.65)
I 0$ ,T 0$ - Note 6
Chromaticity X (0.10) 0.15 (0.20)
Blue
Y (0.05) 0.10 (0.15)
X (0.28) 0.33 (0.38)
White
Y (0.30) 0.35 (0.40)
Note 1: The brightness is measured from the panel center point, P5 in Fig. 6.2, for the typical value.
Note 2: The brightness uniformity is calculated by the equation as below:
Min. Brightness
Brightness uniformity u 100%
Max. Brightness
, which is based on the brightness values of the 5 points measured by BM-5 as shown in Fig. 6.2.
Horizontal Line
D
Photo Detector: BM-5 D/4 D/2 3D/4
W/4 1 2
Field: 1$
Distance: 500 mm W W/2 5
3W/4 3 4
LCD panel
Fig. 6.1 Fig. 6.2
SHEET
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Note 3: The Contrast Ratio is measured from the center point of the panel, P5, and defined as the
following equation:
Brightness of White
CR
Brightness of Black
Note 4: The definition of response time is shown in Fig. 6.3. The rising time is the period from 90%
brightness to 10% brightness when the data is from white to black. Oppositely, Falling time is
the period from 10% brightness rising to 90% brightness.
White Black White
Tr Rising time Falling time Tf
100 %
90
Brightness
10
0
Fig . 6.3
Note 5: The definition of viewing angle is shown in Fig. 6.4. Angle I is used to represent viewing
directions, for instance, I 270 $ means 6 o'clock, and I 0 $ means 3 o'clock. Moreover, angle
T is used to represent viewing angles from axis Z toward plane XY.
The viewing direction of this display is 12 o'clock, which means that a photograph with gray
scale would not be reversed in color and the brightness change would be less from this
direction. However, the best contrast peak would be located at 6 o'clock.
T Viewing angle
I 90$
12 o'clock
I (x, y ,0)
$
x' x I 0
I 180$ 3 o'clock
9 o'clock
I 270$
6 o'clock
Fig 6.4
Note 6: The color chromaticity is measured from the center point of the panel, P5, as shown in Fig. 6.2.
Note 7: Relative Brightness V.S DIM Voltage (Reference only)
SHEET
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8. RELIABILITY TESTS
Test Item Condition
1) Operating
High Temperature 240 hrs
2) 80
1) Operating
Low Temperature 240 hrs
2) -30
1) Storage
High Temperature 240 hrs
2) 80
1) Storage
Low Temperature 240 hrs
2) -30
1) Non-Operating
Thermal Shock 2) -30 l 80 240 hrs
3) 0.5 hr l 0.5 hr
1) Operating
High Temperature & 2) 40 & 85%RH
240 hrs
Humidity 3) Without condensation
(Note3)
1) Non-Operating
2) 10 300 Hz 10 min / cycle, 3cycles
Vibration
3) 1.5G each direction
4) X, Y, and Z directions
5) Operating
6) Tip: 150 pF, 330 ,1 sec / cycle
ESD -
7) Condition 1:Panel contact r 8KV
8) Condition 2:Panel non-contact r 15KV
Note 1: Display functionalities are inspected under the conditions defined in the specification after the
reliability tests.
Note 2: The display is not guaranteed for use in corrosive gas environments.
Note 3: Under the condition of high temperature & humidity, if the temperature is higher than 40 , the
humidity needs to be reduced as Fig. 8.1 shown.
Note 4: Temperature of panel display surface area should be 80 Max.
Relative Humidity RH (%)
90
80
70
60
50
40
30
20
10
0
20 25 30 35 40 45 50 55 60 65 70 75
$
Temperature Ta ( C)
Fig. 8.1
SHEET
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9. LCD INTERFACE
9.1 INTERFACE PIN CONNECTIONS
The display interface connector is MSB240420G made by STM and more details of the connector are
shown in the section of outline dimension.
Pin assignment of LCD interface is as below:
Pin No. Signal Function Pin No. Signal Function
1 VDD 11 IN2-
Power Supply for Logic Pixel Data
2 VDD 12 IN2+
3 VSS GND 13 VSS GND
4 NC No Connection 14 CLK IN-
Clock
5 IN0- 15 CLK IN+
Pixel Data
6 IN0+ 16 VSS GND
7 VSS GND 17 IN3-
Pixel Data
8 IN1- 18 IN3+
Pixel Data
9 IN1+ 19 VSS GND
High : 6 bit Mode (Note 2)
10 VSS GND 20 FRC
Low or NC : 8 bit Mode (Note 2)
Note 1: IN n- and IN n+ (n=0,1,2,3),CLK IN- and CLK IN+ are recommended to be twisted or
side-by-side FPC patterns, respectively.
Note 2:"High" stands for 3.3V, "Low" stands for 0V and "NC" stands for no connection.
The backlight interface connector is SM08B-SRSS-TB made by JST, and pin assignment of backlight is
as below:
Pin No. Signal Level Function
1,2 VLED+ - Power Supply for LED
3 NC - No Connection
Enable Pin
4 EN - High : Backlight Enable
Low : Backlight Disable
5 ADIM - Analog Voltage Dimming Function (Voltage Control)
6 DDIM - PWM Dimming Function
7,8 VLED- - GND
SHEET
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9.2 LVDS INTERFALE
(1) 8Bit Mode
FRC=Low or NC
(2) 6Bit Mode
FRC=High CN1
2)
1)
Controll THC63LVDM83R
7 TA0-6 RA0-6
R0-R5,G0 IN0+
7 TB0-6 IN0- RB0-6
G1-G5,B0,B1 IN1+
7 TC0-6 IN1- RC0-6
B2-B5,GND,GND,DE
IN2+ LCD Panel
RD0-6
IN2- controller
IN3+
IN3-
CLK IN+
CLK IN CK OUT
CK PLL CLK IN- PLL
470 820
470 820
3.3V
Note 1) LVDS cable impedance should be 100 ohms per signal line when each
2-lines(+,-) is used in differential mode.
Note 2) Transmitter Made by Thine : THC63LVDM83R equivalent.
Transmitter is not contained in Module.
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9.3 LVDS DATA MAPPING
1) THC63LVDM83R Pin Assignment (8 Bit Mode)
Transmitter FRC Transmitter FRC
Pin No. Date Low or NC Pin No. Date Low or NC
51 TA0 R0 (LSB) 20 TC0 B2
52 TA1 R1 22 TC1 B3
54 TA2 R2 23 TC2 B4
55 TA3 R3 24 TC3 B5
56 TA4 R4 27 TC4 GND
3 TA5 R5 28 TC5 GND
4 TA6 G0 (LSB) 30 TC6 DE
6 TB0 G1 50 TD0 R6
7 TB1 G2 2 TD1 R7 (MSB)
11 TB2 G3 8 TD2 G6
12 TB3 G4 10 TD3 G7 (MSB)
14 TB4 G5 16 TD4 B6
15 TB5 B0 (LSB) 18 TD5 B7 (MSB)
19 TB6 B1 25 TD6 NA
DE : Display Enable
NA : Not Available
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2) THC63LVDM83R Pin Assignment (6 Bit Mode)
Transmitter FRC Transmitter FRC
Pin No. Date High Pin No. Date High
51 TA0 R0 (LSB) 20 TC0 B2
52 TA1 R1 22 TC1 B3
54 TA2 R2 23 TC2 B4
55 TA3 R3 24 TC3 B5 (MSB)
56 TA4 R4 27 TC4 GND
3 TA5 R5 (MSB) 28 TC5 GND
4 TA6 G0 (LSB) 30 TC6 DE
6 TB0 G1 50 TD0 NA
7 TB1 G2 2 TD1 NA
11 TB2 G3 8 TD2 NA
12 TB3 G4 10 TD3 NA
14 TB4 G5 (MSB) 16 TD4 NA
15 TB5 B0 (LSB) 18 TD5 NA
19 TB6 B1 25 TD6 NA
1 cycle
CLK IN-
CLK IN+
IN0+
R1 R0 G0 R5 R4 R3 R2 R1 R0 G0
IN0-
IN1+
G2 G1 B1 B0 G5 G4 G3 G2 G1 B1
IN1-
IN2+
B3 B2 DE GND GND B5 B4 B3 B2 DE
IN2-
DE : Display Enable
NA : Not Available.
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9.6 POWER SEQUENCE
Power Sequence Timing
Note 1: In order to avoid any damages, VDD has to be applied before all other signals. The opposite is
true for power off where VDD has to be remained on until all other signals have been switch off.
The recommended time period is 1 second. Hot plugging might cause display damage due to
incorrect power sequence, please pay attention on interface connecting before power on.
Note 2: In order to avoid showing uncompleted patterns in transient state. It is recommended that
switching the backlight on is delayed for 1 second after the signals have been applied. The
opposite is true for power off where the backlight has to be switched off 1 second before the
signals are removed.
Note 3: The floating state of interface signal shonld be avoid at invalid period.
Note 4: When the interface signal is invalid, please set the power supply of VDD to 0V.
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9.7 DATA INPUT for DISPLAY COLOR(8 BIT MODE)
Red Data Green Data Blue Data
Input color R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
MSB LSB MSB LSB MSB LSB
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Basic Blue(255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Color Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(1) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(2) 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
: : : : : : : : : : : : : : : : : : : : : : : : :
Red
: : : : : : : : : : : : : : : : : : : : : : : : :
Red(253) 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Green(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
: : : : : : : : : : : : : : : : : : : : : : : : :
Green
: : : : : : : : : : : : : : : : : : : : : : : : :
Green(253) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0
Green(254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
Green(255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Blue(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
: : : : : : : : : : : : : : : : : : : : : : : : :
Blue
: : : : : : : : : : : : : : : : : : : : : : : : :
Blue(253) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1
Blue(254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0
Blue(255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Note 1: Definition of gray scale : Color(n) Number in parenthesis indicates gray scale level. Larger
number corresponds to brighter level.
Note 2: Data Signal : 1 : High, 0 : Low
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9.8 DATA INPUT for DISPLAY COLOR (6 BIT MODE)
COLOR & Red Data Green Data Blue Data
Gray Scale
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (63) 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
Green (63) 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0
Basic Blue (63) 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
Color Cyan 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (1) 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
Red (2) 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
Red : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : :
Red (62) 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (63) 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (1) 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
Green (2) 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
Green : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : :
Green (62) 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0
Green (63) 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue (1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Blue (2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Blue : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : :
Blue (62) 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0
Blue (63) 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
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10-1/2
PAGE
7B64PS 2710-TX38D18VM2BAA-1
KAOHSIUNG OPTO-ELECTRONICS INC. SHEET
No.
10. OUTLINE DIMENSIONS
10.1 FRONT VIEW
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KAOHSIUNG OPTO-ELECTRONICS INC. SHEET
No.
9.2 FRAR VIEW
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11. APPEARANCE STANDARD
The appearance inspection is performed based on the conditions as below:
- The distance between inspector's eyes and display is 35 cm.
- Ambient illumination:100~200 lx for light on inspection.
- The viewing angle to the front surface of display panel is 15 degree in vertical direction and 45 degree
in horizontal direction.
T T
Fig. 10.1
11.1 THE DEFINITION OF LCD ZONE
LCD panel is divided into 3 areas as shown in Fig.10.2 for appearance specification in next section. A
zone is the LCD active area (dot area); B zone is the area, which extended 1 mm out from LCD active
area; C zone is the area between B zone and metal frame.
In terms of housing design, B zone is the recommended window area customers' housing should be
located in.
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11.2 LCD APPEARANCE SPECIFICATION
The specification as below is defined as the amount of unexpected phenomenon or material in a zone
(LCD active area) panel. The definitions of length, width and average diameter using in the table are
shown in Fig. 11.3.
Item Criteria Applied zone
Length (mm) Width (mm) Maximum number Minimum space
Scratches on
- W 0.05 Ignored - A
polarizer
0.3 L 10 0.05 W 0.1 4 -
Average diameter (mm) Maximum number
Bubbles / Dent A
0.15 D 0.5 4
Filamentous (Line shape)
Length (mm) Width (mm) Maximum number
A
- W 0.05 Ignored
1) Foreign Materials 0.3 L 2.0 0.05 W 0.1 4
2) Dark / White Spot Round (Dot shape)
Average diameter (mm) Maximum number
D 0.15 Ignored A
0.15 D 0.5 4
Stain on polarizer Those wiped out easily are acceptable
Type Maximum number
1 dot 3
Bright dot-defect 2 adjacent dots 1
3 adjacent dots or above Not allowed
Dot-Defect
1 dot 5 A
(Note 1)
Dark dot-defect 2 adjacent dots 1
3 adjacent dots or above Not allowed
In total 5
Minimum distance 10 mm
ab
2
Fig 11.3
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Note 1: The definitions of dot defect are as below:
- The defect area of the dot must be bigger than half of a dot.
- For bright dot-defect, the dot's appear bright and unchanged in size under showing black
pattern.
- For dark dot-defect, the dot's appear dark and unchanged in size under pure red, green, blue
and white pattern.
- The definition of 1-dot-defect is the defect-dot, which is isolated and no adjacent defect-dot.
- The definition of adjacent dot is shown as Fig. 11.5 to Fig 11.8.
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12. PRECAUTIONS
12.1 PRECAUTIONS of ESD
1) Before handling the display, please ensure your body has been connected to ground to avoid any
damages by ESD. Also, do not touch display's interface directly when assembling.
2) Please remove the protection film very slowly before turning on the display to avoid generating ESD.
12.2 PRECAUTIONS of HANDLING
1) In order to keep the appearance of display in good condition, please do not rub any surfaces of the
displays by using sharp tools harder than 3H, especially, metal frame and polarizer.
2) Please do not stack the displays as this may damage the surface. In order to avoid any injuries,
please avoid touching the edge of the glass or metal frame and wore gloves during handling.
3) Touching the polarizer or terminal pins with bare hand should be avoided to prevent staining and
poor electrical contact.
4) Do not use any harmful chemicals such as acetone, toluene, and isopropyl alcohol to clean display's
surfaces.
5) Do not disassemble the module.
6) Please wipe any unknown liquids immediately such as saliva, water or dew on the display to avoid
color fading or any permanent damages.
7) Do not have pressure or impulse on the module because the module will be damage.
8) Please use soft cloth without chemicals to clean the display by gently wiping.
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12.3 PRECAUTIONS of OPERATING
1) Please input signals and voltages to the displays according to the values defined in the section of
electrical characteristics to obtain the best performance. Any voltages over than absolute maximum
rating will cause permanent damages to this display. Also, any timing of the signals out of this
specification would cause unexpected performance.
2) When the display is operating at significant low temperature, the response time will be slower than it
at 25 C $ .
3) The use of screen saver or sleep mode is recommended when static images are likely for long
periods of time. This is to avoid the possibility of image sticking.
4) Spike noise can cause malfunction of the circuit. The recommended limitation of spike noise is no
bigger than 100 mV p-p.
5) Moisture come into or contact the LCD module may damage LCD module when it is operating.
6) The LED driver board with cable can't be pulled strongly or cable connector will be damaged.
12.4 PRECAUTIONS of STORAGE
If the displays are going to be stored for years, please be aware the following notices.
1) Please store the displays in a dark room to avoid any damages from sunlight and other sources of
UV light.
2) Please store LCD module within the specified storage conditions.
3) It would be better to keep the displays in the container, which is shipped from KOE, and do not
unpack it.
4) Please do not stick any labels on the display surface for a long time, especially on the polarizer.
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13. DESIGNATION of LOT MARK
1) The lot mark is showing in Fig.13.1. First 4 digits are used to represent production lot, T represented
made in Taiwan, and the last 6 digits are the serial number.
2 1 0 1 T 0 0 0 0 0 1
Serial number
T : Made in Taiwan
Week
Month
Year
2) The tables as below are showing what the first 4 digits of lot mark are shorted for.
Year Mark Month Mark Month Mark Week (Days) Mark
2012 2 1 01 7 07 1~7 1
2013 3 2 02 8 08 8~14 2
2014 4 3 03 9 09 15~21 3
2015 5 4 04 10 10 22~28 4
2016 6 5 05 11 11 29~31 5
6 06 12 12
3) Except letters I and O, revision number will be shown on lot mark and following letters A to Z.
4) The location of the lot mark is on the back of the display shown in Fig. 13.1.
TX38D18VM2BAA REV:A
2101T 00001
KOE MADE IN TAIWAN
Fig. 13.1
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