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LD470WUJ
Product Specification
SPECIFICATION
FOR
APPROVAL
( ) Preliminary Specification
( ) Final Specification
Title 47.0" WUXGA TFT LCD
BUYER General SUPPLIER LG.Display Co., Ltd.
MODEL LD470WUJ
MODEL
SUFFIX SCE1 (RoHS Verified)
SIGNATURE SIGNATURE
APPROVED BY APPROVED BY
DATE DATE
K. S. Nah
/ / Chief Senior Engineer
REVIEWED BY
K.N. Kim
/ / Chief Senior Engineer
PREPARED BY
J.H. Song
/ / Senior Engineer
Please return 1 copy for your confirmation with PD Product Design Dept.
LG Display Co., Ltd
your signature and comments.
Ver. 0.0 1 /32
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LD470WUJ
Product Specification
CONTENTS
Number ITEM Page
COVER 1
CONTENTS 2
RECORD OF REVISIONS 3
1 GENERAL DESCRIPTION 4
2 ABSOLUTE MAXIMUM RATINGS 5
3 ELECTRICAL SPECIFICATIONS 6
3-1 ELECTRICAL CHARACTERISTICS 6
3-2 INTERFACE CONNECTIONS 7
3-3 SIGNAL TIMING SPECIFICATIONS 8
3-4 LVDS SIGNAL SPECIFICATION 9
3-5 COLOR DATA REFERENCE 12
3-6 POWER SEQUENCE 13
4 OPTICAL SPECIFICATIONS 14
5 MECHANICAL CHARACTERISTICS 18
6 RELIABILITY 20
7 INTERNATIONAL STANDARDS 21
8 PACKING 22
8-1 PACKING FORM 22
9 PRECAUTIONS 23
9-1 ASSEMBLY PRECAUTIONS 23
9-2 OPERATING PRECAUTIONS 23
9-3 ELECTROSTATIC DISCHARGE CONTROL 24
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 24
9-5 STORAGE 24
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LD470WUJ
Product Specification
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.0 Jun, 19, 2012 - Preliminary Specification(First Draft)
Ver. 0.0 3 /32
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LD470WUJ
Product Specification
1. General Description
The LD470WUJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 46.96 inch diagonally measured
active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06 Billion colors.
It has been designed to apply the 10-bit 2-port LVDS interface.
It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
Mini-LVDS(RGB)
EEPROM
Source Driver Circuit
SCL SDA S1 S1920
G1
LVDS LVDS 1,2 Timing Controller
2Port LVDS Rx + DCA + ODC
LVDS
Option Integrated Control TFT - LCD Panel
signal
Select Signals (1920 RGB 1080 pixels)
CN1
Bit
(51pin) [Gate In Panel]
Select I2C
Power Circuit Power Signals G1080
+12.0V
Block
General Features
Active Screen Size 46.96 inch (1192.87mm) diagonal
Outline Dimension 1061.8(H) x 606.8 (V) x 1.75 mm(D) (Typ.)
Pixel Pitch 0.5415 mm x 0.5415 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 10Bit (D), 1.06 Billion colors
Transmittance (With POL) 5,5 %(Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 6.6W (Typ.)(TBD)
Weight 2.6Kg (Typ.) (TBD)
Display Mode Transmissive mode, Normally black
Surface Treatment (Top) Hard coating(3H), Anti-glare treatment (Haze < 1%),
Possible Display Type Landscape and Portrait Enabled
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Value
Parameter Symbol Unit Remark
Min Max
Power Input LCM VLCD -0.3 +14.0 VDC at 25 r 2 C
Voltage Backlight inverter VBL -0.3 +27.0 VDC
ON/OFF Control Voltage VON/OFF -0.3 +5. 5 VDC
Brightness Control Voltage VBR 0 +5.0 VDC
Operating Temperature TOP 0 +50 C
Storage Temperature TST -20 +60 C
Note 1
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity HST 10 90 %RH
Note: 1. Ambient temperature condition (Ta = 25 r 2 C )
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 C and no condensation of water.
3. Gravity mura can be guaranteed below 40 condition.
4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to 68 with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface
temperature of display area from being over 68 . The range of operating temperature may
degrade in case of improper thermal management in final product design.
90%
60
60%
50 Storage
Wet Bulb
Temperature [ C]
40
Humidity
[(%)RH]
40%
Operation
30
20
10
0
10%
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature [ C]
Ver. 0.0 5 /32
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3. Electrical Specifications
3-1. Electrical Characteristics
It requires one power inputs. That is employed to power for the LCD circuit.
Table 2. ELECTRICAL CHARACTERISTICS
Value
Parameter Symbol Unit Note
Min Typ Max
Circuit :
Power Input Voltage VLCD 11.4 12.0 12.6 VDC
- 550 715 mA 1
Power Input Current ILCD
- 810 1053 mA 2
Power Consumption PLCD - 6.6 8.88 Watt 1
Rush current IRUSH - - 5.0 A 3
Note
1. The specified current and power consumption are under the VLCD=12.0V, Ta=25 r 2 C, fV=120Hz condition,
and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under 5% of typical voltage
White : 1023 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
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3-2. Interface Connections
This LCD module employs a 51-pin connector, It is used for the module electronics
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF or Equivalent, Refer to below table.
- Mating Connector : FI-RE51HL
Table 3-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1 GND Ground 27 Bit Select `H' or NC= 10bit(D) , `L' = 8bit
2 NC No Connection 28 RE0N SECOND LVDS Receiver Signal (A-)
3 NC No Connection 29 RE0P SECOND LVDS Receiver Signal (A+)
4 NC No Connection (Reserved for LGD) 30 RE1N SECOND LVDS Receiver Signal (B-)
5 NC No Connection (Reserved for LGD) 31 RE1P SECOND LVDS Receiver Signal (B+)
6 NC No Connection (Reserved for LGD) 32 RE2N SECOND LVDS Receiver Signal (C-)
7 LVDS Select `H' =JEIDA , `L' or NC = VESA 33 RE2P SECOND LVDS Receiver Signal (C+)
8 NC No Connection 34 GND Ground
9 NC No Connection 35 RECLKN SECOND LVDS Receiver Clock Signal(-)
10 NC No Connection 36 RECLKP SECOND LVDS Receiver Clock Signal(+)
11 GND Ground 37 GND Ground
12 RO0N FIRST LVDS Receiver Signal (A-) 38 RE3N SECOND LVDS Receiver Signal (D-)
13 RO0P FIRST LVDS Receiver Signal (A+) 39 RE3P SECOND LVDS Receiver Signal (D+)
14 RO1N FIRST LVDS Receiver Signal (B-) 40 RE4N SECOND LVDS Receiver Signal (E-)
15 RO1P FIRST LVDS Receiver Signal (B+) 41 RE4P SECOND LVDS Receiver Signal (E+)
16 RO2N FIRST LVDS Receiver Signal (C-) 42 NC No Connection
17 RO2P FIRST LVDS Receiver Signal (C+) 43 NC No Connection
18 GND Ground 44 NC No Connection
19 ROCLKN FIRST LVDS Receiver Clock Signal(-) 45 GND Ground
20 ROCLKP FIRST LVDS Receiver Clock Signal(+) 46 GND Ground
21 GND Ground 47 AGP `H'=AGP, `L or NC' = NSB
22 RO3N FIRST LVDS Receiver Signal (D-) 48 VLCD Power Supply +12.0V
23 RO3P FIRST LVDS Receiver Signal (D+) 49 VLCD Power Supply +12.0V
24 RO4N FIRST LVDS Receiver Signal (E-) 50 VLCD Power Supply +12.0V
25 RO4P FIRST LVDS Receiver Signal (E+) 51 VLCD Power Supply +12.0V
26 NC No Connection - - -
Note :
1. All GND(ground) pins should be connected together to the LCD module's metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
6. Specific pin No. #47 is used for "No signal detection" of system signal interface.
It should be GND or NC for NSB(No Signal Black) during the system interface signal is not.
If this pin is "H", LCD Module displays AGP(Auto Generation Pattern).
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3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6-1. TIMING TABLE for NTSC (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
Display Period tHV - 960 - tclk
Horizontal Blank tHB 100 140 240 tclk
Total tHP 1060 1100 1200 tclk 2200/2
Display Period tVV - 1080 - tHP
Vertical Blank tVB 11 45 69 tHP
Total tVP 1091 1125 1149 tHP
DCLK fCLK 70 74.25 77 MHz 148.5/2
Frequency Horizontal fH 65 67.5 70 KHz
Vertical fV 57 60 63 Hz
Table 6-2. TIMING TABLE for PAL (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
Display Period tHV - 960 - tclk
Horizontal Blank tHB 100 140 240 tclk
Total tHP 1060 1100 1200 tclk 2200/2
Display Period tVV - 1080 - tHP
Vertical Blank tVB 228 270 300 tHP
Total tVP 1308 1350 1380 tHP
DCLK fCLK 70 74.25 77 MHz 148.5/2
Frequency Horizontal fH 65 67.5 70 KHz
Vertical fV 47 50 53 Hz
Note The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate.
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
0.7VDD
DE, Data
0.3VDD
tCLK
0.5 VDD
DCLK
Valid data
First data Invalid data Pixel 0,0 Pixel 2,0 Invalid data
Valid data
Second data Invalid data Pixel 1,0 Pixel 3,0 Invalid data
DE(Data Enable)
tHV
tHP
1 1080
DE(Data Enable)
tVV
tVP
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3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
V CM V IN _ MAX V IN _ MIN
# V CM = {( LVDS +) + ( LVDS - )} /2
0V
Description Symbol Min Max Unit Note
LVDS Common mode Voltage VCM 1.0 1.5 V -
LVDS Input Voltage Range VIN 0.7 1.8 V -
Change in common mode Voltage VCM 250 mV -
2) AC Specification
Tclk
LVDS Clock
A
LVDS Data
( F clk = 1 /T clk )
tSKEW tSKEW
A
Tclk
LVDS 1'st Clock 80%
LVDS 2nd / 3rd / 4th Clock
20%
tRF
tSKEW_min tSKEW_max
Description Symbol Min Max Unit Note
High Threshold VTH 100 300 mV
LVDS Differential Voltage 3
Low Threshold VTL -300 -100 mV
LVDS Clock to Data Skew Margin tSKEW |(0.25*Tclk)/7| ps -
LVDS Clock/DATA Rising/Falling time tRF 260 (0.3*Tclk)/7 ps 2
Effective time of LVDS teff 360 ps -
LVDS Clock to Clock Skew Margin (Even to Odd) tSKEW_EO 1/7* Tclk Tclk -
Note 1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If tRF isn't enough, teff should be meet the range.
3. LVDS Differential Voltage is defined within teff
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0.5tui tui
LVDS Data
360ps
VTH
0V
(Differential) VTL
360ps
teff
LVDS CLK tui : Unit Interval
0V
(Differential)
* This accumulated waveform is tested with differential probe
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3-5. Color Data Reference
The brightness of each primary color(red,green,blue) is based on the 10-bit gray scale data input for the color.
The higher binary input, the brighter the color. Table 8 provides a reference for color versus data input.
Table 8. COLOR DATA REFERENCE
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3-6. Power Sequence
90% 90%
Power Supply For LCD
VLCD 10% 10% 10%
0V
T1
T8 T5
T2
Valid Data Vcm : LVDS Common mode Voltage
30%
Interface Signal (Tx) 0V
100% T3 T4
T6
User Control Signal
(LVDS_select, BIT_select)
Power for Lamp T7 Lamp ON
Table 8. POWER SEQUENCE
Value
Parameter Unit Notes
Min Typ Max
T1 0.5 - 20 ms
T2 0 - - ms 4
T3 200 - - ms 3
T4 200 - - ms 3
T5 1.0 - - s 5
T6 - - T2 ms 4
T7 0.5 - - s
T8 100 - - ms 6
Note : 1. Please avoid floating state of interface signal at invalid period.
2. When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.
3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. If the on time of signals(Interface signal and user control signals) precedes the on time of Power(VLCD),
it will be happened abnormal display. When T6 is NC status, T6 doesn't need to be measured.
5. T5 should be measured after the Module has been fully discharged between power off and on
period.
6. It is recommendation specification that T8 has to be 100ms as a minimum value.
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4. Optical Specification
Optical characteristics are determined after the unit has been `ON' and stable in a dark environment at 25 2 C.
The values are specified at distance 50cm from the LCD surface at a viewing angle of ) and T equal to 0 .
FIG. 9 shows additional information concerning the measurement equipment and method.
LCD Module Pritchard 880 or
Optical Stage(x,y)
equivalent
50cm
FIG. 9 Optical Characteristic Measurement Equipment and Method
Ta= 25 2 C, VLCD=12.0V, fV=60Hz, Dclk=74.25MHz
Table 6. OPTICAL CHARACTERISTICS VBR_A=1.65V, Back Light : LD420WUB-SCE1
Value
Parameter Symbol Unit Note
Min Typ Max
Contrast Ratio CR 1000 1200 - 1
Rising Tr -
Response Time ms 2
Falling Tf -
Rx 0.639
RED
Ry 0.334
Color Coordinates Gx Typ 0.290 Typ
GREEN
[CIE1931] Gy -0.03 0.606 +0.03
Bx 0.146
BLUE
By 0.058
Viewing Angle (CR>10)
x axis, right(I=0 ) Tr 89 - -
x axis, left (I=180 ) Tl 89 - -
degree 3
y axis, up (I=90 ) Tu 89 - -
y axis, down (I=270 ) Td 89 - -
Gray Scale - - - 4
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Note : 1. Contrast Ratio(CR) is defined mathematically as :
CR(Contrast Ratio) = Maximum CRn (n=1, 2, 3, 4, 5)
Surface Luminance at position n with all white pixels
CRn =
Surface Luminance at position n with all black pixels
n = the Position number(1, 2, 3, 4, 5). For more information, see FIG 10.
. Surface luminance is determined after the unit has been `ON' and 1Hour after lighting the
backlight in a dark environment at 25 2 C. Surface luminance is the luminance value at center
1-point across the LCD surface 50cm from the surface with all pixels displaying white.
For more information see the FIG. 10.
2. Response time is the time required for the display to transition from G(0) to G(255) (Rise Time, TrR)
and from G(0) to G(255) (Decay Time, TrD). For additional information see the FIG. 11.
3. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are
determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
is normal to the LCD module surface. For more information, see the FIG. 12.
4. Gray scale specification
Gamma Value is approximately 2.2. For more information, see the Table 7.
Table 7. GRAY SCALE SPECIFICATION
Gray Level Luminance [%] (Typ.)
L0 0.07
L63 0.27
L127 1.04
L191 2.49
L255 4.68
L319 7.66
L383 11.5
L447 16.1
L511 21.6
L575 28.1
L639 35.4
L703 43.7
L767 53.0
L831 63.2
L895 74.5
L959 86.7
L1023 100
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Measuring point for surface luminance & luminance variation
H
A
V
B
A : H / 4 mm
B : V / 4 mm
@ H,V : Active Area
FIG. 10 5 Points for Luminance Measure
Response time is defined as the following figure and shall be measured by switching the input signal for
"Black" ~ "White" and "White" ~ "Black".
Tr Tf
100
90
Optical
Response
10
Black White White Black
0
FIG. 11 Response Time
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Dimension of viewing angle range
Normal
E Y
I = 90 q , Up
I = 180 q , Left
T
I
I = 0 q , Right
I = 270 q , Down
FIG.12 Viewing Angle
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5. Mechanical Characteristics
Table 8 provides general mechanical characteristics.
Table 8. MECHANICAL CHARACTERISTICS
Item Value
Horizontal 1061.8 mm
Outline Dimension
Vertical 606.8 mm
(Only Glass)
Thickness 1.75 mm
Horizontal 1039.68 mm
Active Display Area
Vertical 584.82 mm
Weight 2.6kg(typ), 2.9Kg(Max)
Hard coating(3H)
Surface Treatment
Anti-glare treatment of the front polarizer(<1%)
Note : Please refer to a mechanic drawing in terms of tolerance at the next page.
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[ FRONT VIEW ]
T BD
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6. Reliability
Table 9. ENVIRONMENT TEST CONDITION
No. Test Item Condition
1 High temperature storage test Ta= 60 C 240h
2 Low temperature storage test Ta= -20 C 240h
3 High temperature operation test Ta= 50 C 50%RH 240h
4 Low temperature operation test Ta= 0 C 240h
5 Humidity condition Operation Ta= 40 C ,90%RH
Altitude operating 0 - 15,000 ft
6
storage / shipment 0 - 40,000 ft
Note : Before and after Reliability test, Board ass'y should be operated with normal function.
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7. International Standards
7-1. Environment
a) RoHS, Directive 2002/95/EC of the European Parliament and of the council of 27 January 2003
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8. Packing
8-1. Packing Form
a) Package quantity in one Pallet : 70 pcs
b) Pallet Size :1250 mm(L) X 800 mm(W) X 1088 mm(H)
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9. Precautions
Please pay attention to the followings when you use this TFT LCD panel.
9-1. Assembly Precautions
(1) Please attach the surface transparent protective plate to the surface in order to protect the polarizer.
Transparent protective plate should have sufficient strength in order to the resist external force.
(2) You should adopt radiation structure to satisfy the temperature specification.
(3) Acetic acid type and chlorine type materials for the cover case are not desirable because the former
generates corrosive gas of attacking the polarizer at high temperature and the latter causes circuit break
by electro-chemical reaction.
(4) Do not touch, push or rub the exposed polarizers with glass, tweezers or anything harder than HB
pencil lead. And please do not rub with dust clothes with chemical treatment.
Do not touch the surface of polarizer for bare hand or greasy cloth.(Some cosmetics are detrimental
to the polarizer.)
(5) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft materials like
chamois soaks with petroleum benzine. Normal-hexane is recommended for cleaning the adhesives
used to attach front / rear polarizers. Do not use acetone, toluene and alcohol because they cause
chemical damage to the polarizer
(6) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes
deformations and color fading.
(7) Board ass'y should be put on the mold frame properly.
(8) FFC Cable should be connected between System board and Source PCB correctly.
(9) Mechanical structure for backlight system should be designed for sustaining board ass'y safely.
9-2. Operating Precautions
(1) Response time depends on the temperature.(In lower temperature, it becomes longer.)
(2) Brightness depends on the temperature. (In lower temperature, it becomes lower.)
And in lower temperature, response time(required time that brightness is stable after turned on)
becomes longer
(3) Be careful for condensation at sudden temperature change.Condensation makes damage to polarizer or
electrical contacted parts. And after fading condensation, smear or spot will occur.
(4) When fixed patterns are displayed for a long time, remnant image is likely to occur.
(5) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be
done by system manufacturers. Grounding and shielding methods may be important to minimized the
interference.
(6) Please do not give any mechanical and/or electrical impact to board assy. Otherwise, it can't be operated
its full characteristics perfectly.
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9-3. Electrostatic Discharge Control
Since a module is composed of electronic circuits, it is not strong to electrostatic discharge. Make certain that
treatment persons are connected to ground through wrist band etc. And don't touch interface pin directly.
Panel ground path should be connected to metal ground.
9-4. Precautions for Strong Light Exposure
Strong light exposure causes degradation of polarizer and color filter.
9-5. Storage
When storing the board ass'y as spares for a long time, the following precautions are necessary.
(1) Store them in a dark place. Do not expose the board ass'y to sunlight or fluorescent light. Keep the
temperature between 5 C and 35 C at normal humidity.
(2) The polarizer surface should not come in contact with any other object.
It is recommended that they be stored in the container in which they were shipped.
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# APPENDIX-I
Pallet Ass'y
No. Description Material
Pallet Plywood
SHEET Single Wall
PE Sheet PE
Top Packing EPP
Bottom Packing EPP
Angle Packing Single Wall
Tape OPP
Band PP
Clip Steel
Ver. 0.0 25 /32
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LD470WUJ
Product Specification
# APPENDIX- II-1
Board Ass'y ID Label
Model 6060L-XXXX LD470WUJ-XXXX-XXX
Serial No. XXXX
Work Order
Ver. 0.0 26 /32
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LD470WUJ
Product Specification
# APPENDIX- II-2
BOX Label
6060L-0000 LD470WUJ-XXXX-XXX
QTY : 10(PAJU)(P8)(01/01)
Type : BA Buyer : XXXX
Category : PROD
Pallet Label
LD470WUJ SCE1
BA
6060L-XXXX
70 PCS 001/01-01 XXXXX
PAJU KOREA
XXXXXXXXXXXXX XXX
Ver. 0.0 27 /32
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LD470WUJ
Product Specification
# APPENDIX-I-1
Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7="L or NC" )
THC63LVD103
Host System or Compatible
30 Bit
Timing
RED0 33
FI-RE51S-HF Controller
RED1 34
RED2 35
RED3 36 40 12 RO0N
RED4 37 TA1-TA1+ 39 100 RO0P
13
RED5 38 38 14 RO1N
TB1-/TB1+ 37 100
RED6 59 15 RO1P
RED7 61 36 16 RO2N
TC1-/TC1+ 35 100
RED8 4 17 RO2P
RED9 5 TCLK1- 33 19 ROCLKN
100
GREEN0 40 TCLK1+ 32 20 ROCLKP
30 22 RO3N
GREEN1 41 TD1-/TD1+ 29 100
23 RO3P
GREEN2 42 28
24 RO4N
GREEN3 44 TE1-/TE1+ 27 100
25 RO4P
GREEN4 45
GREEN5 46 24 RE0N
TA2-/TA2+ 23 28 100
GREEN6 62 29 RE0P
GREEN7 63 22 RE1N
TB2-/TB2+ 21 30 100
GREEN8 6 31 RE1P
20 RE2N
GREEN9 8 TC2-/TC2+ 19 32 100 RE2P
BLUE0 48 33
TCLK2- 17 35 RECLKN
BLUE1 49
TCLK2+ 16 36
100 RECLKP
BLUE2 50 14
38 RE3N
BLUE3 52 TD2-/TD2+ 13 100 RE3P
12 39
BLUE4 53 RE4N
TE2-/TE2+ 11 40 100
BLUE5 54 RE4P
41
BLUE6 64
BLUE7 1 VESA / JEIDA
7
BLUE8 9
BLUE9 11
Hsync 55
Vsync 57
Data Enable 58
LCM Module
GND
CLOCK 12
Note: 1. The LCD module uses a 100 Ohm[ ] resistor between positive and negative lines of each receiver
input.
2. Refer to LVDS Transmitter Data Sheet for detail descriptions. (THC63LVD103 or Compatible)
3. `9' means MSB and `0' means LSB at R,G,B pixel data.
Ver. 0.0 28 /32
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LD470WUJ
Product Specification
# APPENDIX-I-2
Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7="H")
THC63LVD103
Host System or Compatible
30 Bit
Timing
RED0 4 FI-RE51S-HF Controller
RED1 5
RED2 59
RED3 61 40 12 RO0N
RED4 33 TA1-TA1+ 39 13 100 RO0P
RED5 34 38 14 RO1N
TB1-/TB1+ 37 15 100
RED6 35 RO1P
36 16
RED7 36 RO2N
TC1-/TC1+ 35 17 100
RED8 37 RO2P
33 19 ROCLKN
RED9 38 TCLK1-
32 20 100
GREEN0 6 TCLK1+ ROCLKP
30 22 RO3N
GREEN1 8 TD1-/TD1+ 29 23 100
RO3P
GREEN2 62 28 24 RO4N
GREEN3 63 TE1-/TE1+ 27 25 100
RO4P
GREEN4 40
GREEN5 41 24 28 RE0N
GREEN6 42