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PDTA113E series
PNP resistor-equipped transistors; R1 = 1 k, R2 = 1 k
Rev. 05 -- 2 September 2009 Product data sheet
1. Product profile
1.1 General description
PNP Resistor-Equipped Transistors (RET).
Table 1. Product overview
Type number Package NPN
NXP JEITA JEDEC complement
PDTA113EE SOT416 SC-75 - PDTC113EE
PDTA113EK SOT346 SC-59A TO-236 PDTC113EK
PDTA113EM SOT883 SC-101 - PDTC113EM
PDTA113ES[1] SOT54 (TO-92) SC-43A TO-92 PDTC113ES
PDTA113ET SOT23 - TO-236AB PDTC113ET
PDTA113EU SOT323 SC-70 - PDTC113EU
[1] Also available in SOT54A and SOT54 variant packages (see Section 2)
1.2 Features
I Built-in bias resistors I Reduces component count
I Simplifies circuit design I Reduces pick and place costs
1.3 Applications
I General purpose switching and I Circuit drivers
amplification
I Inverter and interface circuits
1.4 Quick reference data
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - -50 V
IO output current (DC) - - -100 mA
R1 bias resistor 1 (input) 0.7 1 1.3 k
R2/R1 bias resistor ratio 0.8 1 1.2
NXP Semiconductors PDTA113E series
PNP resistor-equipped transistors; R1 = 1 k, R2 = 1 k
2. Pinning information
Table 3. Pinning
Pin Description Simplified outline Symbol
SOT54
1 input (base)
2 output (collector) 2
R1
3 GND (emitter) 1 1
2
3 R2
001aab347 3
006aaa148
SOT54A
1 input (base)
2 output (collector) 2
R1
3 GND (emitter) 1 1
2
R2
3
001aab348 3
006aaa148
SOT54 variant
1 input (base)
2 output (collector) 2
R1
3 GND (emitter) 1 1
2
3 R2
001aab447 3
006aaa148
SOT23, SOT323, SOT346, SOT416
1 input (base)
3 3
2 GND (emitter)
R1
3 output (collector) 1
R2
1 2 2
006aaa144
sym003
SOT883
1 input (base)
1 3
2 GND (emitter)
3 R1
3 output (collector) 2 1
Transparent
R2
top view
2
sym003
PDTA113E_SER_5