xerox altoIIcode3.mu free download

File name altoIIcode3.mu.txt

; A L T O I I C O D E 3 . M U ; Copyright Xerox Corporation 1979 ;***Derived from ALTOIICODE2.MU, as last modified by ;***Tobol, August 5, 1976 12:13 PM -- fix DIOG2 bug ;***modified by Ingalls, September 6, 1977 ; BitBLT fixed (LREG bug) and extended for new memory ;***modified by Boggs and Taft September 15, 1977 10:10 PM ; Modified MRT to refresh 16K chips and added XMSTA and XMLDA. ; Fixed two bugs in DEXCH and a bug in the interval timer. ; Moved symbol and constant definitions into AltoConsts23.mu. ; MRT split and moved into two 'get' files. ;***modified by Boggs and Taft November 21, 1977 5:10 PM ; Fixed a bug in the Ethernet input main loop. ;***modified by Boggs November 28, 1977 3:53 PM ; Mess with the information returned by VERS  ;Get the symbol and constant definitions #AltoConsts23.mu; ;LABEL PREDEFINITIONS ;The reset locations of the tasks: !17,20,NOVEM,,,,KSEC,,,EREST,MRT,DWT,CURT,DHT,DVT,PART,KWDX,; ;Locations which may need to be accessible from the Ram, or Ram ; locations which are accessed from the Rom (TRAP1): !37,20,START,RAMRET,RAMCYCX,,,,,,,,,,,,,TRAP1; ;Macro-op dispatch table: !37,20,DOINS,DOIND,EMCYCLE,NOPAR,JSRII,U5,U6,U7,,,,,,,RAMTRAP,TRAP; ;Parameterless macro-op sub-table: !37,40,DIR,EIR,BRI,RCLK,SIO,BLT,BLKS,SIT,JMPR,RDRM,WTRM,DIRS,VERS,DREAD,DWRITE,DEXCH,MUL,DIV,DIOG1,DIOG2,BITBLT,XMLDA,XMSTA,,,,,,,,,; ;Cycle dispatch table: !37,20,L0,L1,L2,L3,L4,L5,L6,L7,L8,R7,R6,R5,R4,R3X,R2X,R1X; ;some global R-Registers $NWW $R4; State of interrupt system $R37 $R37; Used by MRT, interval timer and EIA $MTEMP $R25; Public temporary R-Register  ;The Display Controller ; its R-Registers: $CBA $R22; $AECL $R23; $SLC $R24; $HTAB $R26; $YPOS $R27; $DWA $R30; $CURX $R20; $CURDATA $R21; ; its task specific functions: $EVENFIELD $L024010,000000,000000; F2 = 10 DHT DVT $SETMODE $L024011,000000,000000; F2 = 11 DHT $DDR $L026010,000000,124100; F2 = 10 DWT !1,2,DVT1,DVT11; !1,2,MOREB,NOMORE; !1,2,NORMX,HALFX; !1,2,NODD,NEVEN; !1,2,DHT0,DHT1; !1,2,NORMODE,HALFMODE; !1,2,DWTZ,DWTY; !1,2,DOTAB,NOTAB; !1,2,XNOMORE,DOMORE; ;Display Vertical Task DVT: MAR_ L_ DASTART+1; CBA_ L, L_ 0; CURDATA_ L; SLC_ L; T_ MD; CAUSE A VERTICAL FIELD INTERRUPT L_ NWW OR T; MAR_ CURLOC; SET UP THE CURSOR NWW_ L, T_ 0-1; L_ MD XOR T; HARDWARE EXPECTS X COMPLEMENTED T_ MD, EVENFIELD; CURX_ L, :DVT1; DVT1: L_ BIAS-T-1, TASK, :DVT2; BIAS THE Y COORDINATE DVT11: L_ BIAS-T, TASK; DVT2: YPOS_ L, :DVT;  ;Display Horizontal Task. ;11 cycles if no block change, 17 if new control block. DHT: MAR_ CBA-1; L_ SLC -1, BUS=0; SLC_ L, :DHT0; DHT0: T_ 37400; MORE TO DO IN THIS BLOCK SINK_ MD; L_ T_ MD AND T, SETMODE; HTAB_ L LCY 8, :NORMODE; NORMODE:L_ T_ 377 . T; AECL_ L, :REST; HALFMODE: L_ T_ 377 . T; AECL_ L, :REST, T_ 0; REST: L_ DWA + T,TASK; INCREMENT DWA BY 0 OR NWRDS NDNX: DWA_ L, :DHT; DHT1: L_ T_ MD+1, BUS=0; CBA_ L, MAR_ T, :MOREB; NOMORE: BLOCK, :DNX; MOREB: T_ 37400; L_ T_ MD AND T, SETMODE; MAR_