. Electronic Components Datasheets 74LVC1G17 free download

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74LVC1G17 Single Schmitt trigger buffer Rev. 10 -- 29 June 2012 Product data sheet 1. General description The 74LVC1G17 provides a buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined outputs. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complies with JEDEC standard JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Unlimited rise and fall times Inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C NXP Semiconductors 74LVC1G17 Single Schmitt trigger buffer 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G17GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; SOT353-1 5 leads; body width 1.25 mm 74LVC1G17GV 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 74LVC1G17GM 40 C to +125 C XSON6 plastic extremely thin small outline package; SOT886 no leads; 6 terminals; body 1 1.45 0.5 mm 74LVC1G17GF 40 C to +125 C XSON6