Philips 40175 free download

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: · The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC · The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40175B MSI Quadruple D-type flip-flop Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Quadruple D-type flip-flop DESCRIPTION The HEF40175B is a quadruple edge-triggered D-type flip-flop with four data inputs (D0 to D3), a clock input (CP), an overriding asynchronous master reset input (MR), four buffered outputs (O0 to O3), and four complementary HEF40175B MSI buffered outputs (O0 to O3). Information on D0 to D3 is transferred to O0 to O3 on the LOW to HIGH transition of CP if MR is HIGH. When LOW, MR resets all flip-flops (O0 to O3 = LOW, O0 to O3 = HIGH), independent of CP and D0 to D3. Fig.1 Functional diagram. PINNING D0 to D3 CP MR O0 to O3 O0 to O3 Fig.2 Pinning diagram. data inputs clock input (LOW to HIGH; edge-triggered) master reset input (active LOW) buffered outputs complementary buffered outputs FUNCTION TABLE INPUTS CP D H L X X Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial = positive-going transition = negative-going transition X MR H H H L O H L no change L OUTPUTS O L H no change H HEF40175BP(N): 16-lead DIL; plastic (SOT38-1) HEF40175BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF40175BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America FAMILY DATA, IDD LIMITS category MSI See Family Specifications January 1995 2 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... January 1995 3 Fig.3 Logic diagram. Philips Semiconductors Quadruple D-type flip-flop HEF40175B MSI Product specification Philips Semiconductors Product specification Quadruple D-type flip-flop AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays CP On, On HIGH to LOW 5 10 15 5 LOW to HIGH MR On HIGH to LOW MR On LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 10 15 5 10 15 5 LOW to HIGH Set-up time Dn CP Hold time Dn CP Minimum clock pulse width; LOW Minimum MR pulse width; LOW Recovery time for MR Maximum clock pulse frequency 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 fmax tRMR tWMRL tWCPL thold tsu 60 20 15 25 10 10 90 35 25 80 30 20 0 0 0 5 15 20 tTLH tTHL tPLH tPHL tPLH tPHL 80 35 25 70 30 25 75 30 25 70 30 25 60 30 20 60 30 20 30 10 5 -5 0 0 45 15 10 40 15 10 -30 -20 -15 11 30 45 160 ns 70 ns 50