RAM M12L64164A free download

File name M12L64164A.pdf

ESMT M12L64164A Revision History Revision 1.0 (13 Dec. 2001) - Original Revision 1.1 (10 Jan. 2002) - Add -6 spec Revision 1.2 (30 Jan. 2002) - Delete Page44 PACKING DIMENSION 54-LEAD TSOP(II) SDRAM (400mil) (1:4). Revision 1.3 (26 Apr. 2002) - tRFC : 60ns. (Page5) Revision 1.4 (21 Oct. 2002) - Add -5, Delete -8. (P1,4~7) Revision 1.5 (24 Dec. 2002) - Delete -5 spec (AC/DC). (page 1,4~7) Revision 1.6 (13 Feb. 2003) - Change Icc5 / Icc3p /Icc3ps : Icc5=130mA-->Icc5=180mA / Icc3p=5mA-->Icc3p=10mA / Icc3ps=5mA-->Icc3ps=10mA (page 4) Revision 1.7 (03 Mar. 2003) - tRAS = 45ns --> tRAS = 42ns. (page 5,7) Revision 1.8 (30 Jul. 2003) - DQM with clock suspended(Full Page Read) needs modified to describe "Full Page". (page 17) Revision 1.9 (22 Oct. 2003) - Modify refresh period. (page 1,13,23,40,41) Revision 2.0 (17 Dec. 2003) - Delete "The write burst length is programmed using A9 - Test mode use A7~A8 - Vendor specific options use A9, A10~A11 and A12~BA0 Revision 2.1 (21Jul. 2004) - Correct typing error Page18(tCCD tCDL), Page22(Note4, Note6), Page23(Note8 Note6), Page29(Note3, Note4) - Correct plot1.2 clock suspended during read(Page17) - Correct plot1.2 read interrupted by precharge(Page22)Delete -5 spec (AC/DC). (page 1,4~7) Revision 2.2 (21 Jan. 2005) - Add pb-free product number(Page1,7) Revision 2.3 (17 Mar. 2005) - Add Pb-free to ordering information - Modify P8 for bank precharge state to idle state Revision 2.4 (12 Jul. 2005) - Rename Pb to Non-Pb-free on ordering info. - Modify ICC1; ICC2N; ICC3N; 1CC4; ICC5 spec Revision 2.5 (30 Sep. 2005) - Add