datasheets 74ls76 free download

File name 74ls76.pdf

SN54/74LS76A DUAL JK FLIP-FLOP WITH SET AND CLEAR The SN54 / 74LS76A offers individual J, K, Clock Pulse, Direct Set and Di- rect Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level DUAL JK FLIP-FLOP of the J and K inputs will perform according to the Truth Table as long as mini- WITH SET AND CLEAR mum set-up times are observed. Input data is transferred to the outputs on the HIGH-to-LOW clock transitions. LOW POWER SCHOTTKY J SUFFIX MODE SELECT -- TRUTH TABLE CERAMIC CASE 620-09 INPUTS OUTPUTS 16 OPERATING MODE 1 SD CD J K Q Q Set L H X X H L Reset (Clear) H L X X L H *Undetermined L L X X H H N SUFFIX Toggle H H h h q q PLASTIC Load "0" (Reset) H H l h L H 16 CASE 648-08 Load "1" (Set) H H h l H L Hold H H l l q q 1 *Both outputs will be HIGH while both SD and CD are LOW, but the output states are unpredictable if SD and CD go HIGH simultaneously. H,h = HIGH Voltage Level D SUFFIX L,l = LOW Voltage Level