epson Epson DLQ-3000 (upgrade model) Service Manual free download

File name Epson DLQ-3000 (upgrade model) Service Manual.pdf

EPSON IMPACT DOT PRINTER DLQ-3000 (upgrade model) SERVICE MANUAL EPSON 4006094 PREFACE This document provides supplementary information to describe the new DLQ-3000 (Minerva+), which is a follow-on version of the DLQ-3000 (Minerva). Therefore, you must refer to this information in conjunction with DLQ-3000 (Minerva) Service Manual for details on any subjects common to both printers. -i- REVISION SHEET Revision Issue Date Revision Page A March 15, 1996 - 1st issue -ii- DLQ-3000 (MINERVA+) Product Description 1.1 FEATURES Minerva+ is a 24-pin serial dot-matrix and flat-bed type impact printer. As this printer follows on DLQ-3000 (MINERVA+), the main future is almost same as DLQ-3000 (MINERVA). The main features are ; t Two built-in and one optional I/F Bi-Directional Parallel Interface (IEEE-1284 nibble mode) Serial Interface Type-B Interface (Option) The exterior view of DLQ-3000 (MINERVA+) is the same as DLQ-3000 (MINERVA). Rev.A 1-1 Product Description DLQ-3000 (MINERVA+) 1.2 INTERFACE OVERVIEW The printer provides an 8-bit Bi-directional parallel interface and serial interface as standard. Moreover, it is possible to interface to various computers using the optional type-B interface board. This section describes the specifications of the standard interfaces. 1.2.1 Parallel Interface Specifications 1.2.1.1 Forward Channel Transmission mode: 8-bit parallel, IEEE-1284 compatible mode Synchronization: By STROBE pulse Handshaking: By BUSY and ACKNLG signal Signal level: TTL-compatible level, IEEE-1284 level 1 device Adaptable connector: 57-30360 (Amphenol) or equivalent Data transmission timing: See Figure 1-1. Note: Transition time (rise time and fall time) of every input signal must be less than 200 ns and every output signal must be less than 120 ns. The BUSY signal is at a HIGH level before either -ERROR signal is at a LOW level or the PE signal is at a HIGH level until all these signals return to their inactive state. The BUSY signal is at a HIGH level in the following cases: - During data reception (see the figure above) - When the input buffer is full - When the INIT input signal is active - During initialization - When the ERROR signal is active - In the self-test mode - In the SelecType - When the parallel interface is not selected. The ERROR signal is at a LOW