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TDA8172 TV VERTICAL DEFLECTION OUTPUT CIRCUIT . . . POWER AMPLIFIER FLYBACK GENERATOR THERMAL PROTECTION DESCRIPTION The TDA8172 is a monolithic integrated circuit in HEPTAWATTTM package. It is a high efficiency power booster for direct driving of vertical windings of TV yokes. It is intended for use in Color and B & W television as well as in monitors and displays. PIN CONNECTIONS (top view) 7 6 5 4 3 2 1 NON-INVERTING INPUT OUTPUT STAGE SUPPLY OUTPUT GROUND FLYBACK GENERATOR SUPPLY VOLTAGE INVERTING INPUT HEPTAWATT (Plastic Package) ORDER CODE : TDA8172 Tab connected to Pin 4 BLOCK DIAGRAM + VS 2 6 3 FLYBACK GENERATOR 1 POWER AMPLIFIER 5 THERMAL P ROTECTION 7 TDA8172 4 YOKE May 1996 1/5 8172-02.EPS 8172-01.EPS TDA8172 ABSOLUTE MAXIMUM RATINGS Symbol VS V5 , V6 V3 V1 , V7 Io Io Io I3 I3 Ptot Tstg, Tj Supply Voltage (pin 2) Flyback Peak Voltage Voltage at Pin 3 Amplifier Input Voltage Output Peak Current (non repetitive, t = 2 ms) Output Peak Current at f = 50 or 60 Hz, t 10 µs Output Peak Current at f = 50 or 60 Hz, t > 10 µs Pin 3 DC Current at V5 < V2 Pin 3 Peak to Peak Flyback Current at f = 50 or 60 Hz, tfly 1.5 ms Total Power Dissipation at Tcase = 90 °C Storage and Junction Temperature Parameter Value 35 60 + Vs + Vs ­ 0.5 2.5 3 2 100 3 20 ­ 40, +150 V A A A mA A W °C 8172-01.TBL 8172-03.TBL 8172-02.TBL Unit V V THERMAL DATA Symbol Rth (j­c) Parameter Thermal Resistance Junction-case Max. Value 3 Unit °C/W ELECTRICAL CHARACTERISTICS (refer to the test circuits, VS = 35V, Tamb = 25oC unless otherwise specified) Symbol I2 I6 I1 V3L V5 V5L V5H Tj Parameter Pin 2 Quiescent Current Pin 6 Quiescent Current Amplifier Input Bias Current Pin 3 Saturation Voltage to GND Quiescent Output Voltage Output Saturation Voltage to GND Output Saturation Voltage to Supply Junction Temperature for Thermal Shut Down Test Conditions I3 = 0, I5 = 0 I3 = 0, I5 = 0 V1 = 1 V, V7 = 2 V V1 = 2 V, V7 = 1 V I3 = 20 mA Vs = 35V, Ra = 39 k I5 = 1.2 A I5 = 0.7 A ­ I5 = 1.2 A ­ I5 = 0.7 A Min. Typ. 8 16 ­ 0.1 ­ 0.1 1 18 1 0.7 1.6 1.3 140 1.4 1 2.2 1.8 Max. 16 36 ­1 ­1 1.5 Unit Fig. mA mA µA µA V V V V V V °C 1a 1a 1a 1a 1c 1d 1c 1c 1b 1b 2/5 TDA8172 Figure 1 : DC Test Circuits. Figure 1 a : Measurement of I1 ; I2 ; I6 VS I2 2 6 5 10k S1 1 7 4 b I1 V7 1V 8172-03.EPS Figure 1 b : Measurement of V5H VS 2 6 V5H 1 1V 7 V7 4 I5 8172-04.EPS I6 5 a S1 : (a) I2 and I6 ; (b) I1 Figure 1 c : Measurement of V3L ; V5L VS I 3 or I 5 2 6 3 b 1 3V 5 7 V7 4 V 3L V 5L 8172-05.EPS Figure 1 d : Measurement of V5 VS 2 6 S1 12k a 2V 1 5 7 V7 Ra 4 V5 S1 : (a) V3L ; (b) V5L 3/5 8172-06.EPS 5.6k TDA8172 Figure 2 : AC Test Circuit 1N4001 VS C1 0.1 µF 2 VREF Vi C2 470µF D1 C3 220µF t fly 6 3 Iy 7 V7 to Ly 24.6mH GND R1 1 10k TDA8172 4 5 C4 0.22µF R7 1.5 R4 R6 330 to RT1 4.7k R3 IN R2 5.6k 12k Ry 9.6 C6 4.7 µF 8.2k C5 2200µF R 5 Iy 8172-07.EPS 8172-08.EPS - 8172-09.EPS *Re comme nde d for VREF filtering R5 8.2 to MOUNTING INSTRUCT