Atmel AT29C040A free download

File name 29C040.pdf

Features · · · · · · · · · · · · Fast Read Access Time - 100 ns 5-Volt-Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 2048 Sectors (256 bytes/sector) Internal Address and Data Latches for 256-Bytes Internal Program Control and Timer Hardware and Software Data Protection Two 16 KB Boot Blocks with Lockout Fast Sector Program Cycle Time - 10 ms DATA Polling for End of Program Detection Low Power Dissipation 40 mA Active Current 100 µA CMOS Standby Current Typical Endurance > 10,000 Cycles Single 5V ± 10% Supply CMOS and TTL Compatible Inputs and Outputs Description The AT29C040A is a 5-volt-only in-system Flash Programmable and Erasable Read Only Memory (PEROM). Its 4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with Atmel's advanced nonvolatile CMOS EEPROM technology, the device offers access times up to 100 ns, and a low 220 mW power dissipation. When the device is deselected, the CMOS standby current is less than 100 µA. The device endurance is such that any sector can typically be written to in excess of 10,000 times. The programming algorithm is compatible with other devices in Atmel's 5-volt-only Flash family. (continued) 4-Megabit (512K x 8) 5-volt Only 256-Byte Sector CMOS Flash Memory AT29C040A AT29C040A Pin Configurations Pin Name A0 - A18 CE OE WE Function Addresses Chip Enable Output Enable Write Enable I/O0 - I/O7 Data Inputs/Outputs NC No Connect DIP Top View TSOP Top View Type 1 0333E­9/97 Description (Continued) To allow for simple in-system reprogrammability, the AT29C040A does not require high input voltages for programming. Five-volt-only commands determine the operation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29C040A is performed on a sector basis; 256-bytes of data are loaded into the device and then simultaneously programmed. During a reprogram cycle, the address locations and 256bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the end of a program cycle has been detected, a new access for a read or program can begin. Block Diagram Device Operation READ: The AT29C040A is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dualline control gives designers flexibility in preventing bus contention. BYTE LOAD: Byte loads are used to enter the 256bytes of a sector to be programmed or the software codes for data protection. A byte load is performed by applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE h