ITT TVPO2066 free download

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TVPO 2066 TV Controller with On-Screen Display for TV Receivers Edition August 24, 1992 6251-327-3E ITT Semiconductors TVPO 2066 Contents Page 3 3 3 4 4 4 5 5 5 5 5 5 5 6 7 8 8 8 8 8 9 9 9 9 10 11 12 14 14 15 16 17 17 18 19 20 20 21 Section 1. 2. 2.1. 2.2. 2.3. 2.4. 2.5. 2.6. 2.7. 2.8. 2.9. 2.9.1. 2.9.2. 2.9.3. 3. 3.1. 3.2. 3.3. 3.4. 3.5. 4. 4.1. 4.2. 4.2.1. 4.2.2. 4.3. 4.4. 4.5. 4.5.1. 4.5.2. 4.5.3. 5. 5.1. 5.2. 5.3. 5.4. 5.5. 5.6. Title Introduction The Functional Blocks of the TVPO 2066 The 8049 Microcomputer The Remote­Control Decoder The Mains Flip­Flop and Reset Circuit The IM Bus and Non­Volatile Memory The Clock Generator and the Sequence Control The D/A Converters for the Analog Outputs The Tuning Voltage Generator The Ports The On­Screen Display Outputs and Inputs for the OSD Display Format Display Control Description of Hardware Component Registers Registers for Infrared Control Register for Port 3 Registers for IM­Bus Control Registers for Analog Outputs & MAINS­Control Registers for On­Screen Display Specifications Outline Dimensions Pin Connections 40­Pin DIL Package 44­Pin PLCC Package Pin Descriptions Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions Characteristics Appendix DAC Poly­Counter Code On­Screen Display Format Character Set Programmed Versions of TVPO 2066 User Options Application Circuit 2 TVPO 2066 TV­Controller with Integrated On­Screen Display Ability 1. Introduction In comparison to the older TVPO 2065 hardware, the port 3 of the TVPO 2066 consists of 6 x 12 V/2 mA open­ drain outputs instead of 5 V/25 mA open­drain outputs. "TVPO 2066" is the name of the unprogrammed hardware. The programmed versions will be called: ­ TVPO 2066­Axx ­ TVPO 2066­Dxx for analog TV­sets for digital TV­sets 2. The Functional Blocks of the TVPO 2066 The hardware components of the TVPO 2066 are: ­ 8048­core, fully compatible to 8048 instruction set ­ 10K ROM, 256 byte RAM ­ four 64 steps analog output to control vol., color etc. ­ single 4032 steps analog output for controlling of a VS­tuner ­ IR decoder for ITT­IR (remote control with IRT 1250/60) ­ mains flip­flop for standby mode ­ IM­bus interface for non­volatile memory and devices of DIGIT 2000 system for digital video­processing. ­ fast counter input (T1) for automatic search (for analog TV­sets) ­ 12 digital combined inputs/outputs (8 or 10 for DIL­ package) ­ 8 digital outputs ­ integrated 12­digit on­screen display 2.1. The 8049 Microcomputer For the description of the commands and characteristics of the 8049, please refer to the CCU 2030, CCU 2050, CCU 2070 data sheet. The 8049 provides separate address space for program, data, in/out, and external data. The ROM is organized in banks of 2 K Bytes. Bank 0 occupies the addresses 0 to 2047. The other banks (10, 11, 12, 13) share the addresses 2048 to 4095. The different banks are selected through the bank select register 15 as described for the CCU 2070 in the CCU 2030, 2050, 2