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Now downloading free:NOBLEX RCD 138

NOBLEX RCD 138 free download

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File information:
File name:Noblex - RCD -138.PDF
Size:493 kB
Extension:.pdf
Mfg:NOBLEX
Model:RCD 138 🔎
Original:
Descr:Reproductor nobles con CD modelo RCD 138
Group:Electronics > Automobile > Electrical diagram
Uploaded:23-02-2010
User:juanma2468
Multipart:No multipart

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Extracted files:1
File name Noblex - RCD -138.PDF

VVCC3 BY SVCD MP3 OPEN R1 33K C1 0.1U YC[0..7] VCC U1 YC7 YC6 YC5 YC4 YC3 YC2 YC1 YC0 GND P/N 28 27 26 25 24 23 22 21 17 18 19 20 16 15 14 13 29 P7 P6 P5 P4 P3 P2 P1 P0 MODE3 MODE2 MODE1 MODE0 MASTER CBSWAP SVIDEO SLEEP CLK VSYNC HSYNC CVBS/Y CVBS/C NC FSADJUST COMP VREF_OUT VREF_IN AVCC AGND TEST AGND VDD DGND 32 1 4 11 10 5 6 8 9 7 3 2 12 31 30 VVCC3 GND VCC3 GND R3 560 C3 0.1U R4 75 C2 470P VSYNC HSYNC R5 VSYNC HSYNC VID_P/N TVRES 27MHZ VSYNC HSYNC VID_P/N TVRES XT1 27MHz 27MHZ R17 4.7K 6 C4 10P 74ACU04 VCC3 GND 4.7K CN3 1 2 3 4 5 6 CON6 TVRES 27MHZ SPCA711A(SVCD) C12 33P(22P) C13 33P(22P) VCC3 VGND GND U8B(MP3)B 4 3 2 GND U8A(MP3)A 1 AVCC 74ACU04 74ACU04 + TC1 100U GND BC1 0.1U GND VGND VGND VGND U8C(MP3)C BY MP3 SVCD OPEN 5 R6 AUD_MUTE CD_EMPH AU_XCK IC1 AU_LRCK AU_DATA AU_BLCK AU_LRCK AU_DATA AU_BLCK 1 2 3 4 5 6 7 LRCK DATA BCK NC CAP ROUT GND 4.7K 3 Q2 8550 2 1 C5 SCKI FOR DM NC NC LOUT VCC 14 13 12 11 10 9 8 + R7 10U 1K Q3 C6 680P R9 1K 8050 R8 100K L AVCC R + TC2 10U CA713 R10 AGND 1K Q4 C7 680P C8 + R12 8050 R11 100K AGND 10U 1K REF:D:/ORCAD/NGAILIK/MPEGBOARD:CA711.SCH TITLE:SPCA718+CXA2647N+SONY BOOMBOX(SONY213VS) SCHEMATIC APPD: CHECK: DATE: DIAGRAM DRN:Fang DATE: REV: 01 A4 ENG: DATE: NOTE:subject to change without notice for improvement! DATE: NGAI LIK ELECTRONICS Co.,LTD. NL-DES-F09/REV.0/Aug.01.2002 VCC GND BC2 VCC R13 VCC25 33 R14 R15 TC3 + R18 1K 2 3 Q5 9014 1 SHOCK BC4 0.1U 10K M_RESET VCC3 GND VCC25 GND VCC25 33 GND GND VCC3 GND C10 500P GND C11 0.068U R123 R124 R125 R126 R127 10K 10K 10K 10K 10K PLLVCC25 GND BC3 0.1U 0.1U R16 24K KEY1 KEY2 KEY3 KEY4 KEY5 AU_XCK AU_DATA AU_LRCK AU_BLCK AU_XCK AU_DATA AU_LRCK AU_BLCK C14 22P GND CD_DATA CD_LRCK CD_BLCK R20 CN4 TC4 10U R21 10K 10K 10U 2 VID_P/N TVRES R19 10K 1 D1 1N4148 IRI SQCK VFD_CLK VFD_DATA VFD_STB XRST CLOSE OPEN DDAT XLAT CLOK SENS SCOR LDON AU_BLCK AU_LRCK AU_DATA AU_XCK CD_BLCK CD_LRCK CD_DATA 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 CDRW 27MHZ U2 YC[0..7] MIC2 GND MIC1 MIC 1 2 3 TC5 10U MICGND R22 10K C15 C16 1000P 82P TC6 10U + 27MHZ HSYNC VSYNC VID_P/N TVRES 27MHZ HSYNC VSYNC VID_P/N TVRES MICGND MICGND DQM0 /WE /CAS /RAS0 BA0 SDRAM_CLK KEY3 SCLK C2PO SENS SQSO SQCK XRST KEY1 KEY2 DDAT XLAT CLOK SCOR RW.SW CL_SW DBSP AUD_MUTE EXT_DAT EXT_CLK KEY4 KEY5 VFD_STB VFD_CLK VFD_DATA IR_IN DISP_E DISP_RS DQM0 /WE /CAS /RAS0 BA0 SDRAM_CLK CDRW R2 C2PO SENS SQSO SQCK XRST CLOSE OPEN DDAT XLAT CLOK SCOR LDON CL_SW 2SPEED AUD_MUTE EXT_CLK PAD0 PAD1 VFD_STB VFD_CLK VFD_DATA IRI 0 SHOCK R27 RA5 R28 GND R29 0 OPEN /WE /CAS /RAS0 DA8 DA7 DA6 DA5 DA4 DA0 DA1 DA2 DA3 RD3 RD4 RD2 RD5 RD1 RD6 RD0 RD7 RA0 RA1 RA2 RA3 RA10 RA4 RA11 2K DRVCC VCC VCC3 BC6 0.1U GND DD12 DD11 DD10 DD9 DD8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 PVDD2 DD12 DD11 DD10 DD9 DD8 PVSS1 PVDD1 WE_B CAS_B RAS0_B

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