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File name:LG laptop motherboard schematic diagram.rar
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Descr:LG laptop motherboard schematic diagram
Group:Electronics > Computer equipment > Notebooks Laptops
Uploaded:26-02-2010
User:GUI0
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File name LG laptop motherboard schematic diagram.pdf

INTEL P4P-M VCC_VID CPU_COREVCC PAGE 1- 3 THERMAL SENSOR 3.3V PAGE 40 FAN CONN 5V PAGE 40 BLOCK DIAGRAM ADM1032ARM MAX6510 FSB 100MHz CPU_COREVCC DDR TWO DIMM CONN. VCC2.5A PAGE9-10 LCD CONN DDR 133MHz RS200M VCC1_8B(CORE) VCC2_5A(MEMORY) VCC3B,VCC2_5B,VCC1_8B PAGE 4-7 VCC_LCD(3.3V) PAGE24 CRT CONN VCC5B_CRT PAGE25 PCI INTERFACE 3.3V 33MHZ IDE-P HDD VCC5B PAGE17 ATA INTERFACE (PRIMARY) M1535+ VCC3B,VCC3M VCC5B,VCC5M_1535 IDE-S CD,DVD,COMBO ATA INTERFACE FIXED BAY VCC5B PAGE18 (SECONDARY) PAGE13-15 AC'97 INTERFACE MONO SPEAKER PAGE37 AMP AMPVCC(5V) PAGE38 INT_MIC PAGE37 w w w AVCC5 PAGE36 AC'97 AUDIO CODEC p la . CDC CONN. VCC3AUX PAGE16 ISA VCC5B FLASH ROM s p to VCC5M_1535 RTC PAGE22 PIO USB0 USB1 VCC5B PAGE34 SIDE REAR USBPWR(5V) PAGE41 USBPWR(5V) PAGE41 m e h c AD23 INTB# PCI_REQ0#/PCI_GNT0# a ic t page30 .c s EEPROM PAGE30 m o AD22 INTC# PCI_REQ2#/PCI_GNT2# PCI1510 BCM5901 RJ45 PAGE31 VCC3M page27 VCC3AUX,LAN1.2V,LAN2.5V CARD BUS 3.3V 5V 12V page28 LPC VCC3B, 33MHz INT. KBD TRACK POINTER PAGE47 H8 VCC5B PAGE21 VCCSW,VCC5_H8 PAGE45 POWER S/W VOLUME S/W 1 2 3 4 5 4 12 HA#(3:31) 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 K2 K4 L6 K1 L3 M6 L2 M3 M4 N1 M1 N2 N4 N5 T1 R2 P3 P4 R3 T2 U1 P6 U3 T4 V2 R6 W1 T5 U4 V3 W2 Y1 AB1 A 4 12 H_REQ#(0:4) 0 1 2 3 4 J1 K5 J4 J3 H3 REQ0# REQ1# REQ2# REQ3# REQ4# ADDRESS LINES 4 12 4 12 4 12 H_ADSTB0# H_ADSTB1# H_ADS# L5 ADSTB0# R5 ADSTB1# G1 AC1 V5 AA3 G2 D2 L25 K26 K25 J26 E2 H2 H5 ADS# AP0# AP1# BINIT# BNR# BPRI# DP3# DP2# DP1# DP0# DEFER# DRDY# DBSY# CONTROL U5 B CPU_COREVCC R576 should be placed near PinH6 within 0.5inch. 4 12 4 12 H_BNR# H_BPRI# 4 12 4 12 4 12 R596 H_DEFER# H_DRDY# H_DBSY# 1% 49.9 4 12 H_BREQ0# C 4 12 CPURESET# R589 should be placed near PinAB25 within 0.5inch. D W w 1 W w W w s A N p o tI H p C la . . R576 1% 51 TP4587 TP4573 U6 TESTHI8 W4 TESTHI9 Y3 TESTHI10 H6 BR0# IERR# R598 56 IERR# AC3 TP4588 CPU_COREVCC R589 1% 2 12 13 CPU_INIT# H_LOCK# W5 G4 V6 INIT# LOCK# 4 12 h I c F NORTHWOOD . m eX PART1/3 aC DATA LINES ic M tO E21 DBI0# G25 DBI1# P26 DBI2# V21 DBI3# E22 F21 K22 J23 R22 P23 W22 W23 0 1 2 3 DSTBN0# DSTBP0# DSTBN1# DSTBP1# DSTBN2# DSTBP2# DSTBN3# DSTBP3# .c C s. DBI#(0:3) 4 12 H_DSTBN0# H_DSTBP0# H_DSTBN1# H_DSTBP1# H_DSTBN2# H_DSTBP2# H_DSTBN3# H_DSTBP3# 4 4 4 4 4 4 4 4 12 12 12 12 12 12 12 12 HD#(0:63) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# m oN 6 4 12 A MCERR# RESET# RS2# RS1# RS0# RSP# TRDY# 51.1 H_RS2# 4 12 H_RS1# 4 12 H_RS0# 4 12 4 12 H_TRDY# AB25 F4 G5 F1 AB2 J6 AA24 AA22 AA25 Y21 Y24 Y23 W25 Y26 W26 V24 V22 U21 V25 U23 U24 U26 T23 T22 T25 T26 R24 R25 P24 R21 N25 N26 M26 N23 M24 P21 N22 M23 D63# D62# D61# D60# D59# D58# D5



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