midland alan42 free download

File name Al42multi_document.pdf

THEORY OF OPERATION ALAN42-MULTI Description Of Frequency Determining And Stabilizing Circuit Introduction THE FREQUENCIES FOR TRANSMITTER AND RECEIVER LOCAL FREQUENCIES ARE ALL DERIVED A SIGNAL 4.0 [MHz] CRYSTAL BY MEANS OF A PHASE LOCKED LOOP. THE FIRST LOCAL OSCILLATOR FREQUENCIES ARE 16.29 [MHz] (CH.1) TO 16.55 [MHz] (CH.80). THE SECOND LOCAL FREQUENCY IS FIXED AT 10.6950 [MHz] TO GENERATE SECOND IF 455 [KHz]. DURING TRANSMIT, THE VCO OF THE PLL OPERATES 13.4925[MHZ] (CH.1) TO 13.6225 [MHz] (CH.8) THE VCO FREQUENCY GOES TO THE DOUBLER CIRCUIT Q103, L10, L11 WHICH DOUBLES THE FREQUENCY TO GENEGATE 26.985 [MHz] (CH.1) TO 27.245 [MHz] (CH.8). Q36,Q38 VCO Q103 TO TRANSMITTER DOUBLER 13.4925[MHz] (CH.1) ~ 13.6225 [MHz] (CH.8) 26.985 [MHz] (CH.1) ~27.245 [MHz] (CH.8) THE VCO OPERATING FREQUENCY FOR THE RECEIVER IS 16.29 [MHz] (CH.1) TO 16.55 [MHz] (CH.8) AS THE FIRST LOCAL OSCILLATOR, INJECTED THROUGH THE BUFFER AMP Q38 INTO THE FIRST FET BALANCED MIXER Q5, Q6 DESCRIPTIONS OF EACH BLOCK (1) INTRODUCTION THE SYNTHESIZER IS IMPLEMENTED WITH THE FOLLOWING COMPONENTS : PLL IC (IC4), X-TAL (X 2), VCO, VARICAP DIODE (D13) IC1 IS A CPU THAT INCLUDES LCD DRIVER AND AII OF CONTROL CIRCUIT. THE PLL IC (IC4) OF PLL BLOCK, THE Q36, L7, C91, C92, C85, C90,VARICAP DIODE D13 ARE CLAPP OSCILLATOR CIRCUIT TO OPERATE AS A VCO .Q35 IS A SWITCHING TRANSISTOR TO CONNECT OR DISCONNECT THE TUNING CAPACITOR IN THE VCO OSCILLATOR TANK CIRCUIT FOR TRANSMITTER OR RECEIVER. Q38 WORKS AS A BUFFER AMP FOR RX LOCAL FREQUENCIES (16 [MHz]) AND TX CARRIER GENERATING FREQUENCIES (13 [MHz]). (2) REFERENCE FREQUENCY THE CRYSTAL, X2(4.0 [MHz]) AND OTHER COMPONENTS AT PIN 1 AND 16 OF IC4 CAN MAKE A REFERENCE FREQUENCY OSCILLATOR WITH INTERNAL AMPLIFIER. (3) VCO Q36 AND SURROUNDING PARTS ARE CONSISTING A CLAP OSCILLATOR WORKS AS A VCO OF IC4 WITH APPROPRIATE CONTROL VOLTAGE ON D13, THE VCO CAN BE OSCILLATE OVER THE REQUIRED RANGE OF 13.4925[MHz] TO 16.55 [MHz]. (4) PROGRAMMABLE DIVIDER AND ITS CONTROL THE CPU(IC1) AND PLL IC (IC4) COMMUNICATE BY SERIEL DATA. THE PROGRAMMABLE INPUTS FOR EACH CHANNELS ARE SETTED CPU (IC1). EACH INPUT SIGNAL TO CONTROL THE PLL IC IS DONE WITH THE PROVIDED KEY INPUT PINS PIN 36, 37, AND PIN38 OF IC1. (5) PHASE DETECTOR AND VCO CONTROL THE PHASE DETECTOR IS A DIGITAL PHASE COMPARATOR WHICH COMPARES THE PHASE OF THE REFERENCE SIGNAL WITH PROGRAMMABLE DIVIDER OUTPUT SQUARE WAVES AND DEVELOPS A SERIES OF PULSES WHOSE DC LEVEL DEPENDS ON THE PHASE ERROR OF EACH SIGNAL. THE PHASE DETECTOR PULSE OUTPUT IS FED TO AN ACTIVE LOW PASS FILER AND RC LOW PASS FILTER OUTPUT SIGNAL OF IC4 IS FILTERED AND FED TO VARICAP D13 CONTROL THE VCO FREQUENCY. (6) TRANSMITTER / RECEIVER BUFFER AMP OUTPUT SIGNAL OF Q36 IS FED INTO THE BUFFER AMP Q38, L8 TO INCREASE THE STRENGTH OF TX CARRIER FREQUENCY AND 1st LOCAL FREQUENCIES. (7) TRANSMITTER DOUBLER THE OUTPUT SIGNAL OF Q38, L8GOES TO AN AMPLIFIER WITH TUNING CIRCUIT Q103, L10, L11 WHICH DOUBLES INCOMING 13 MH