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File name HP COMPAQ PRESARIO C700 - COMPAL LA-4031 JBL81 - REV 1.0 - presente de ZOUAVE.pdf

A B C D E 1 1 2 Compal confidential Schematics Document Mobile Merom uFCPGA with Satna Rosa Platform 2007-07-30 REV:0.2 2 3 3 4 4 Security Classification Issued Date 2007/03/26 Compal Secret Data Deciphered Date 2006/07/26 Title Compal Electronics, Inc. Cover Sheet Rev 1.0 Sheet E THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number Custom LA-4031P Date: Wednesday, October 24, 2007 1 of 42 A B C D E Compal confidential File Name : LA-4031P ZZZ1 Spartan 1.1 (Merom +Crestline+ICH8) Fan Control page 4 P CB 1 Mobile Yonah/Merom uFCPGA-478 CPU Socket P page 4,5,6 1 Thermal Sensor ADM1032AR page 4 Clock Generator ICS9LPRS355 page 15 FSB H_A#(3..31) 533/667/800MHz H_D#(0..63) CRT/TV-OUT page 16 NB Crestline page 7,8,9,10,11,12 DDR2 -400/533/667 Dual Channel DDR2-SO-DIMM X2 BANK 0, 1, 2, 3 page 13,14 LVDS Conn page 17 2 2 USB Card Reader DMI USB Conn PCI BUS PCI-E BUS LED page 28 3 page 27 page 27 USB2.0 AC-LINK/Azalia SB ICH8 page 18,19,20,21 Audio Conexant CX20561-12Z page 24 SATA MODEM AMOM CX20548 page 25 Realtek RTL8100CL page 23 SATA HDD Connector page 22 AMP & Audio Jack ENE P3017 page 26 3 RTC CKT. page 19 RJ45/11 CONN page 23 Mini-Card WLAN page 22 PATA Master IDE ODD Connector page 22 LPC BUS Power On/Off CKT. page 28 ENE KB926 page 30 SPI SPI ROM 25LF080A page 29 4 DC/DC Interface CKT. page 31 Touch Pad CONN. page 28 Int.KBD page 30 4 Power Circuit DC/DC Page 32,33,34,35,36,37,38 Security Classification Issued Date 2007/03/26 Compal Secret Data Deciphered Date 2006/07/26 Title Compal Electronics, Inc. Block Diagram Rev 1.0 Sheet E THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B C D Size Document Number Custom LA-4031P Date: Wednesday, October 24, 2007 2 of 42 A 5 4 3 2 1 Voltage Rails +5VS power plane +B D +3VS +5VALW +3VALW +1.5VS +1.8V +1.25VS +0.9V +VCCP +CPU_CORE D State Symbol Note : : means Digital Ground S0 S1 S3 S5 S4/AC S5 S4/ Battery only S5 S4/AC & Battery don't exist C O O O O O O O O O O O O O O : means Analog Ground @ : means just reserve , no build DEBUG@ : means just reserve for debug. X X X X X X X X X X C External PCI Devices DEVICE