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File name: | cop88cl.pdf [preview 8-Bit Microcontroller] |
Size: | 572 kB |
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Model: | 8-Bit Microcontroller 🔎 |
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Descr: | The COP888 family of microcontrollers uses an 8-bit single chip core architecture fabricated with National Semiconduc- tor’s M 2 CMOS™ process technology. The COP888CL is a member of this expandable 8-bit core processor family of microcontrollers. |
Group: | Electronics > Components |
Uploaded: | 29-12-2013 |
User: | sorgenkind |
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Extracted files: | 1 | |
File name cop88cl.pdf COP888CL 8-Bit Microcontroller September 2000 COP888CL 8-Bit Microcontroller General Description The following part numbers are pin count and temperature variations of the COP888CL: COP688CL, COP684CL, COP884CL, COP988CL, COP984CL. The COP888 family of microcontrollers uses an 8-bit single chip core architecture fabricated with National Semiconductor's M2CMOSTM process technology. The COP888CL is a member of this expandable 8-bit core processor family of microcontrollers. It is a fully static part, fabricated using double-metal silicon gate microCMOS technology. Features include an 8-bit memory mapped architecture, MICROWIRE/PLUS serial I/O, two 16-bit timer/counters supporting three modes (Processor Independent PWM generation, External Event counter, and Input Capture mode capabilities), and two power savings modes (HALT and IDLE), both with a multisourced wakeup/interrupt capability. This multi-sourced interrupt capability may also be used independent of the HALT or IDLE modes. Each I/O pin has software selectable configurations. The device operates over a voltage range of 2.5V to 6V. High throughput is achieved with an efficient, regular instruction set operating at a maximum of 1 µs per instruction rate. I/O Features n Memory mapped I/O n Software selectable I/O options ( TRI-STATE Output, Push-Pull Output, Weak Pull-Up Input, High Impedance Input) n High current outputs n Schmitt trigger inputs on port G n Packages: -- 44 PLCC with 40 I/O pins -- 40 DIP with 36 I/O pins -- 28 DIP with 24 I/O pins -- 28 SO with 24 I/O pins CPU/Instruction Set Feature n 1 µs instruction cycle time n Ten multi-source vectored interrupts servicing -- External Interrupt with selectable edge -- Idle Timer T0 -- Timers (Each with 2 interrupts) -- MICROWIRE/PLUS -- Multi-Input Wake Up -- Software Trap -- Default VIS (default interrupt) n Versatile and easy to use instruction set n 8-bit Stack Pointer (SP) -- stack in RAM n Two 8-bit Register Indirect Data Memory Pointers (B, X) Key Features n Two 16-bit timers, each with two 16-bit registers supporting: -- Processor Independent PWM mode -- External Event counter mode -- Input Capture mode n 4 kbytes of on-chip ROM n 128 bytes of on-chip RAM Fully Static CMOS n Low current drain (typically < 1 µA) n Single supply operation: 2.5V to 6.0V n Temperature ranges: 0°C to +70°C, -40°C to +85°C, -55°C to +125°C Additional Peripheral Features n n n n Idle Timer Multi-input Wake Up (MIWU) with optional interrupts (8) WATCHDOG and Clock Monitor logic MICROWIRE/PLUSTM serial I/O Development Support n Emulation and OTP devices n Real time emulation and full program debug offered by MetaLink Development System MICROWIRE/PLUSTM, M2CMOSTM, COPSTM microcontrollers, and MICROWIRETM are trademarks of National Semiconductor Corporation. iceMASTERTM is a trademark of MetaLink Corporation. © 2001 National Semiconductor Corporation DS009766 www.national.com COP888CL Block Diagram DS009766-1 FIGURE 1. Block Diagram www.nati |
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