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File name Acer_Aspire_5310_5710_-_COMPAL_LA-3771P_JDW50_JDY70_-_REV_0.1.pdf

A B C D E 1 1 2 Compal confidential IGL50/51 Schematics Document Mobile Yonah uFCPGA with Intel Calistoga_GM/PM+ICH7-M core logic 2006-05-15 REV:0.1 2 3 3 4 4 Security Classification Issued Date 2005/03/10 Compal Secret Data Deciphered Date 2006/03/10 Title Compal Electronics, Inc. Cover Sheet R ev 0 .1 Sheet E THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: , 08, 2006 1 of 48 A B C D E Compal confidential File Name : LA-3061 ZZZ1 PCB PCI-E x 16 VGA Sub BD 1 LVDS Panel Interface V RAM 128/ 256MB Thermal Sensor AD M1032 page 4 Mobile Yonah uFCBGA-479/uFCPGA-478 CPU page 4, 5, 6 1 Fan Control Nvidia G7 2/G73M page 4 H_A#(3..31) H_D#(0..63) 533/667MHz FSB Clock Generator I CS 954306 page 15 PCI-E x 16 page 18 Intel Calistoga GMCH PCBGA 1466 page 7, 8, 9, 10,11,12 DDR2 -400/533/667 Dual Channel BANK 0, 1, 2, 3 DDR2-SO-DIMM X2 page 13,14 LVDS Panel Interface page 2 16 Mini-PCIE Card CRT & TV OUT page 17, 36 2 DMI PCIE x3 LAN I/F page 28 Intel ICH7-M PCI BUS mBGA-652 page 19, 20, 21, 22 USB2.0 AC-LINK New Card Connector x2 page 37 3.3V 33 MHz USB conn X3 page 31, 37 10/100/1G LAN RTL8110CL/SBL page 27 3 CardBus Controller 1394+CARD E NE CB1410 page 24 READER R5C832 page 26 LPC BUS B T Conn page 28 MO DEM A MOM page SubWoofer 29 3 page 31 RJ45 CONN page 28 Slot 0 page 25 1394 page 26 3IN1 READER page 38 ENE KB910/L page 33 Audio AD1986A A MOM page 29 SATA HDD Connector x2 page 23 AMP & Audio Jack page 30 RTC CKT. page 20 SPR CONN. *RJ45 CONN *MIC IN JACK *LINE OUT JACK *1394 CONN *SPDIF CONN *DC JACK *TVOUT CONN *USB CONN x1 *CIR x1 page 34 Int.KBD BIOS page 32 Power On/Off CKT. page 32 page 34 PATA CDROM Connector page 23 T ouch Pad 4 DC/DC Interface CKT. page 35 page 37 4 Power Circuit DC/DC page 39~45 Security Classification Issued Date 2005/03/10 Compal Secret Data Deciphered Date 2006/03/10 Title Compal Electronics, Inc. Block Diagram R ev 0 .1 Sheet E THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size D ocum ent Num ber C u stom I G L50/51 LA-3771 D ate: , 08, 2006 2 of 48 A Power Block Diagram Of The I