File name 19780419_Distributed_BitBlt.pdfInter-Office Menlorandum
To Notetaker Working Group Date April 19, 1978
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From Larry Tesler Location Palo Alto
Subject Distributed BitBlt Organization SSL
XEROX
Filed on: dBitBlt.press For Xerox Internal Use Only
Problem
There has been a question of whether the Notetaker I should do its BitBlts in the emulation
processor or in an I/O processor. If it is done in an I/O processor, then there can be some
overlap between emulation and character generation. If it is done in the emulation
processor, then it will be compatibie with the Notetaker II, which can do faster BitBlts in
custom LSI than Notetaker I could do on an 8086.
Alternatives
( It is possible to involve two processors in the BitBlt, one fetching the source and one storing
into the destination rectangle. The two processors would communicate over three extra lines
on the motherboard. It would not be necessary to gain access to the system bus to use these
lines. The three lines would be: one serial data line; two handshake lines to control the
flow. (Maybe these lines could be multiplexed at a cost of logic at both ends, using phase-
encoding or other tricks.)
If two I/O processors were employed, the emulation processor would be free during the
BitBlt. However, this would require the presence of both I/O boards at all times, or two
8086's on the same board with separate access to the system bus, requirements we don't
otherwise have. An alternative is to use the emulation processor and only one I/O
processor.
There is still a question of which processor should be source and which should be
destination. Since both the source and the destination processors must worry about the
cursor, the situation seems entirely symmetrical in Notetaker I. However, in Notetaker II.
the emulation processor will be faster. Therefore, it should have the larger share of the
work, which is the destination side.
The emulation processor would start a BitBlt by setting up a control block in main memory
and signalling the I/O processor by the interrupt mechanism. It would then start its own
Slore loop going, being sure to wait for each word of the source stream to be available
before doing the logical operation and the store. Hardware and software details of each side
are presented below. A block diagram of the hardware is appended.
Distributed BitBlt 2
The Source
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The source processor would output 16-bit words into a 16-bit bidirectional shift register
(e.g., two 8-bit MSI TTL OM54198's, which shift at 35 MHz and dissipate 360 mW apiece,
or something better). Associated with the shifter would be a four-bit counter, a one-bit
direction register, and a decoder tha | 