AMD 42504 05 s1 m690t ref schematics free download

File name 42504_05_s1_m690t_ref_schematics.pdf

~ A HIGH PERFORMANCE DISC CONTROLLER INTRODUCTION All recoverable errors can be handled by the disc control- TheAm2901A Four-Bit Bipolar Microprocessor Slice, a sig- ler without the intervention of the host computer. In addi- nificant advance in the state-of-the-art technology in Low- tion to supplying logic processing power, the micro- Power Schottky Integrated Circuits, enables the Design En- processor also provides seventeen high-speed, 8-bit tem- gineer to implement new systems with higher logic density, porary storage registers. Most of these registers are better cost-effectiveness, and improved product versatility. assigned specific functions. In this application, twelve reg- The higher logic density and better cost-effectiveness of isters were used to build six 16-bit registers. These regis- microprocessor-based designs is well-known and will not be ters contain the disc address, memory address, transfer discussed here. This application note, describing a Pertec word count, control and status information, error informa- D3441 Disc Controller for the Digital Equipment Corporation tion, and the checksum. Of the remaining five registers, (DEC) PDP-11, will demonstrate how improved product ver- four are utility registers that are employed as needed, and satility can be achieved by employing the Am2901A in the the fifth is the Q register which can be used to store and design of a peripheral controller. retrieve 8-bit values. This disc controller design is not intended to be an example Figure 2, depicting the two Am2901A's, shows that the of a minimal logic, cost-effective controller only one step microprocessor interface to the other sub-sections is very away from the marketplace. Instead, think of it as the grand- simple. The 8-bit bidirectional M bus (microprocessor bus) father.lts large, writeable microprogram control store and its enables the microprocessor to input/output data from/to the generalized disc and UNIBUS interface make it suitable to other subsections of the disc controller. Four condition lines (ZERO, MINUS, OVRFL, and CARRY) communicate the re- be the prototype for a family of disc controllers. Individual sults of logic and arithmetic operations to the sequencer, controllers would use ROM's of the appropriate size for which may select one ofthese lines to determine the address the control store, and the disc interface would be tailored to a particular disc drive. of the next microinstruction. Notice that since the condition