Western Digital 04 WD76C10A free download

File name 04_WD76C10A.pdf

WD76C1 OAILPIL V TABLE OF CONTENTS Section Title Page 1.0 INTRODUCTION 4-1 1.1 Document Scope 4-1 1.2 Features 4-1 1.3 General Description 4-1 1.3.1 WD76C10A 4-1 1.3.2 WD76C10ALP 4-2 1.3.3 WD76C10ALV 4-2 2.0 ARCHITECTURE 4-4 2.1 Initialization And Clocking 4-4 2.2 AT Bus . . . . . . . 4-4 2.3 Main Processor Control 4-4 2.4 Numeric Processor Control 4-4 2.5 Data Bus . . . . . . . 4-4 2.6 Memory And EMS Control 4-4 2.7 Power Management Control 4-5 2.8 Register File . . . . . . 4-5 2.8.1 Lock Status Register 4-5 2.8.2 Lock/Unlock Register 4-6 3.0 SIGNAL DESCRIPTION . . . . 4-10 4.0 INITIALIZATION AND CLOCKING 4-21 4.1 Power Up Reset 4-21 4.2 Clocking 4-21 4.2.1 Internal Clock (CLK14) 4-21 4.2.2 System Bus Clock (SYSCLK) 4-21 4.2.3 Processor Clock (CPUCLK) . 4-21 4.2.4 CPU Clock (CPUCLK) Control Register 4-23 5.0 AT BUS 4-26 5.1 Interrupt Multiplexing ... . 4-26 5.1.1 Data Acknowledge DACK7-5, 3-0 4-26 5.1.2 Data Request DROIN 4-26 5.1.3 Interrupt Requests . . . . . .