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File name: | HP-Bench-Briefs-1987-10-12.pdf [preview HP-Bench-Briefs-1987-10-12] |
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Model: | HP-Bench-Briefs-1987-10-12 🔎 |
Original: | HP-Bench-Briefs-1987-10-12 🔎 |
Descr: | HP Publikacje HP-Bench-Briefs-1987-10-12.pdf |
Group: | Electronics > Other |
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File name HP-Bench-Briefs-1987-10-12.pdf SERVICE INFORMATION FROM HEWLETT-PACKARD 4th Quarter 1987 When a number is expressed in bi- REF nary or binary-coded decimal and an analog voltage is to be produced to represent the number, the most prac- tical way to perform this conversion is to add the currents having values proportional to the weights of the G binary bits. Figure 1 represents a simplified binary weighted D/A con- verter. Switches S1 to SN represent the binary bits and connect either to ground or a reference voltage. Figure 1 shows switch S1 connecting R to the reference voltage and all other switches connected to ground; but since point A is a virtual ground, there is no current through 2R, 4R, up to 2N-1R. The amplifier has, therefore, a gain of = -0.5 If the reference voltage is - 16V, the output Figure 1. Simplified DAC voltages will be: R = 8V, 2R = 4V, 4R = 2V and for 8R = 1V. If S1 and S2 connect to the reference (the other switches t o ground), the gain is 6,66K - 0.75 and the output voltage 12V. ---5K The output is inversely proportional to the value of R. UT The disadvantage of the circuit is high-value resistors representing low- weight bits. A better solution is a ladder configuration for groups of four bits as shown in Figure 2. Be- 80K FOR BINARY tween each group of four resistors 48K FOR BCD that represent weights of 1-2-4-8, there is a resistor that reduces the gain of the amplifier by 16 for binary and by 10 for BCD weights. This eliminates the need for high value resistors. The D/A conversion is further sim- plified with the ladder circuit shown in Figure 3. Note that only values R 80K and 2R are required. Figure 2. Ladder configuration DAC Pub. NO. 5952-0130 @ Hewlett-Packard 1987 WWW.HPARCHIVE.COM If the reference voltage itself is vari- the output polarity obeys the rules of Figure 5 is an example of a 3-digit able or controlled by another DIA algebraic signs. BCD digital-to-analog converter with converter, this circuit is referred to dual polarity output. The 3-digit as a multiplying DAC. The output of Figure 4 shows an inverted R/2R number is stored in registers U2, U4 |
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