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UM3B/UM6B SYSTEM BLOCK DIAGRAM
A
POWER A
THERMAL REGULATOR CPU VR
SMSC1422 +1.5V_SUS/+0.75V_DDR_VTT
PG 51
PG 35 PG 47
DC/DC
+1.05V_PCH PG 48 +3.3V_ALW/+5V_ALW/
CLOCK +15V_ALW PG 46
SLG8SP585VTR +1.05V_VTT PG 49
(QFN-32)
PG 15
Arrandale
POWER SYSTEM
DDR3-SODIMM1
RESET CIRCUIT PG 42
RVS Type PG 13
Dual Channel DDR3
BATT
800/1066 1.5V
AC/BATT CHARGER PG 45
DDR3-SODIMM2 ( rPGA 989 ) CONNECTOR
RVS Type PG 14 RUN POWER SW
B
PG 3,4,5,6 PG 53 +3.3V_SUS/+5V_SUS
B
+5V/+3.3V/+1.8V PG 52
FDI DMI X 4
SATA
SATA-ODD LVDS
PG 32 Panel Connector
PG 24
SATA
SATA-HDD TMDS LEVEL SHIFTER
PG 32 HDMI CONN.
PI3VDP411LSZDE PG 23 PG 23
VGA
USB conn x 1 USB2.0 CRT CONN.
PG 25
PG 31
PCH PCIE 2.0 LOM
Bluetooth BTB Conn USB2.0 RTL8103E PG 37
BT365 PG 30 (HM55) PCIE 2.0
C MINI-CARD C
USB2.0
USB2.0 WLAN PG 32
Camera PG 40
PCIE 2.0
MINI-CARD
USB2.0
IHDA WWAN PG 31
USB2.0 USB2.0 CARD READER
PG 7,8,9,10,11,12
PG26
DB CONN
AUDIO/AMP RTS5159 PG 32
ALC269Q-GR PG 36 DB
USB2.0 USB2.0
USB conn x 2
DB CONN
PG26 SPI
LPC
A- MIC Audio Audio FLASH
conn SPK conn Jacks x2 4Mbytes
PG 36 PG 36 PG 40 KBC PG 28
ITE8502
D
DB 17X8 D
PG 27
Keyboard
VER :C3B
USER PWA: QUANTA
SPI PS/2 PG 33
INTERFACE
PWB: Title
COMPUTER
PG 34 FLASH Schematic Block Diagram1
1Mbytes Touchpad Size Document Number Rev
UM3B/UM6B 1C
PG 28 PG 33
Date: Wednesday, September 30, 2009 Sheet 1 of 59
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Table of Contents Power States
CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
SIGNAL
1 Schematic Block Diagram
2 Front Page +PWR_SRC 10V~+19V 24,30,45,46,47,48,49,50,51 MAIN POWER S0~S5
3-6 Clarksfield/Auburndale
+RTC_CELL +3.0V~+3.3V 08,11,29,30 RTC S0~S5
7-12 PCH
A 13-14 DDRIII SO-DIMM(204P) +5V_ALW2 +5V 37,46,52,53 LARGE POWER MAIN POWER S0~S5 A
15 Clock Generator
+5V_ALW +5V 13,33,44,46,47,48,49,50,51,52 LARGE POWER ALW_ON S0~S5
16-22 BLANK PAGE
23 HDMI CONN +3.3V_ALW +3.3V 29,30,35,36,37,42,44,45,46,47,51,52,53 8051 POWER 3.3V_ALW_ON S0~S5
24 LCD CONN
+5V_SUS +5V 11,33,34,37,51,52 SLP_S5# CTRLD POWER SUS_ON
25 CRT CONN
07,08,09,10,11,13,14,19,24,28,29,37,41,42,44
26 DB CONN +3.3V_SUS +3.3V ,48,49,50,52 SLP_S5# CTRLD POWER SUS_ON
27 SIO (ITE8502)
+1.5V_SUS +1.5V 03,05,13,14,47,50,52 SODIMM POWER SUS_ON
28 FLASH / RTC
29 MINI-Card (WWAN) +0.75V_DDR_VTT +0.75V 13,14,47,52 SODIMM POWER RUN_ON
30 MINI-Card (WLAN\WPAN)
+5V_RUN +5V 11,18,24,25,35,36,38,39,40,51,52 SLP_S3# CTRLD POWER RUN_ON
31 USB
3,7,8,9,10,11,13,14,15,17,24,25,26,28,29,30
32 SATA (HDD & CD_ROM) +3.3V_RUN +3.3V ,31,32,33,35,37,38,39,40,41,42,46,51,52,60 SLP_S3# CTRLD POWER RUN_ON
33 TP / KEYBOARD
+1.8V_RUN +1.8V 05,11,44,52 SDVO POWER RUN_ON
34 PWR SWITCH / /LED
B 35 FAN / THERMAL +1.05V_VTT +1.1V 03,05,10,11,49,60 CPU POWER RUN_ON B
36 CODEC ALC269
+1.5V_RUN +1.5V 11,28,31,32,52 Express Card/Min Card RUN_ON
37 LAN(RTL8103M/RJ-45)
38 System Reset Circuit +5V_HDD +5V 35 HDD Power HDDC_EN
39 BLANK PAGE
+1.05V_PCH +1.05V 08,09,11,15,48 PCH POWER RUN_ON
40 1.8V_RUN(RT9018/RT9024)
41 Charger (MAX8731) +VCC_CORE +0.7V~+1.77V 05,51 CPU CORE POWER IMVP_VR_ON
42 3V/5V (TPS51427A) LCDVCC_TST_EN
+LCDVCC +3.3V 24 LCD Power & ENVDD
43 1.5_DDR/0.75(TPS51116)
44 1.05V_PCH(TPS51218) +5V_MOD +5V 35 MOD Power MODC_EN
45 1.05_VTT(TPS51218)
46 GFX_VCORE (MAX17028)
47 CPU CORE(MAX17036)
48 Run Power Switch
49 DCin & Batt
C C
50 PAD & SCREW
51 EMI CAP GND PLANE PAGE DESCRIPTION
52 SMBUS BLOCK
53 THERMAL MAP GND ALL
54 Power Block Diagram
55 Power sequence Block
56 XDP
57
58
59
60
D D
QUANTA
Title
COMPUTER
Index & Power Status
Size Document Number Rev
UM3B/UM6B 1A
Date: Wednesday, September 30, 2009 Sheet 2 of 59
1 2 3 4 5 6 7 8
5 4 3 2 1
U9A
B26 PEG_ICOMPI R244 49.9/F U9B
PEG_ICOMPI H_COMP3
PEG_ICOMPO A26 AT23 COMP3
[7] DMI_TXN0 A24 DMI_RX#[0] PEG_RCOMPO B27 BCLK A16 CLK_CPU_BCLK [10]
MISC
C23 A25 R245 750/F H_COMP2 AT24 B16 CLK_CPU_BCLK# [10]
[7] DMI_TXN1 DMI_RX#[1] PEG_RBIAS COMP2 BCLK#
[7] DMI_TXN2 B22 DMI_RX#[2] H_COMP1 T29
CLOCKS
[7] DMI_TXN3 A21 DMI_RX#[3] PEG_RX#[0] K35 G16 COMP1 BCLK_ITP AR30
J34 AT30 T30
D PEG_RX#[1] H_COMP0 BCLK_ITP# D
[7] DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33 AT26 COMP0
[7] DMI_TXP1 D23 DMI_RX[1] PEG_RX#[3] G35 PEG_CLK E16 CLK_PCIE_3GPLL [9]
DMI
[7] DMI_TXP2 B23 DMI_RX[2] PEG_RX#[4] G32 PEG_CLK# D16 CLK_PCIE_3GPLL# [9]
[7] DMI_TXP3 A22 DMI_RX[3] PEG_RX#[5] F34 [27] H_CPUDET# AH24 SKTOCC#
PEG_RX#[6] F31 DPLL_REF_SSCLK A18 DREFSSCLK [9]
[7] DMI_RXN0 D24 DMI_TX#[0] PEG_RX#[7] D35 DPLL_REF_SSCLK# A17 DREFSSCLK# [9]
G24 E33 H_CATERR# AK14
[7] DMI_RXN1 DMI_TX#[1] PEG_RX#[8] CATERR#
THERMAL
[7] DMI_RXN2 F23 DMI_TX#[2] PEG_RX#[9] C33
[7] DMI_RXN3 H23 DMI_TX#[3] PEG_RX#[10] D32
PEG_RX#[11] B32 SM_DRAMRST# F6 DDR3_DRAMRST# [13,14]
D25 C31 H_PECI AT15
[7] DMI_RXP0 DMI_TX[0] PEG_RX#[12] [10] H_PECI PECI
F24 B28 AL1 SM_RCOMP_0
[7] DMI_RXP1 DMI_TX[1] PEG_RX#[13] SM_RCOMP[0]
E23 B30 AM1 SM_RCOMP_1
[7] DMI_RXP2 DMI_TX[2] PEG_RX#[14] SM_RCOMP[1]
G23 A31 AN1 SM_RCOMP_2 +1.05V_VTT
[7] DMI_RXP3 DMI_TX[3] PEG_RX#[15] SM_RCOMP[2]
H_PROCHOT# AN26 PROCHOT# R163 2
PEG_RX[0] J35 PM_EXT_TS#[0] AN15 1 10K
DDR3
MISC
H34 AP15 R151 2 1 10K R162,R147 Remove 8/13 Ray
PEG_RX[1] PM_EXT_TS#[1]
[7] FDI_TXN[7:0] PEG_RX[2] H33 PM_EXTTS#0 [13]
FDI_TXN0 E22 F35 [10] H_THERM AK15 PM_EXTTS#1 [14]
FDI_TXN1 FDI_TX#[0] PEG_RX[3] THERMTRIP#
D21 FDI_TX#[1] PEG_RX[4] G33
FDI_TXN2 D19 E34
FDI_TXN3 FDI_TX#[2] PEG_RX[5]
D18 FDI_TX#[3] PEG_RX[6] F32 PRDY# AT28
FDI_TXN4 G21 D34 AP27 R149
FDI_TXN5 FDI_TX#[4] PEG_RX[7] PREQ# *12.4K/F_NC
PCI EXPRESS -- GRAPHICS
E19 FDI_TX#[5] PEG_RX[8] F33
FDI_TXN6 F21 B33 AN28
FDI_TX#[6] PEG_RX[9] TCK
Intel(R) FDI
FDI_TXN7 G18 D31 H_CPURST# AP26 AP28
FDI_TX#[7] PEG_RX[10] RESET_OBS# TMS
PWR MANAGEMENT
A32 AT27 XDP_TRST# R295 51
PEG_RX[11] TRST#
JTAG & BPM
[7] FDI_TXP[7:0] PEG_RX[12] C30
FDI_TXP0 D22 A28 [7] PM_SYNC AL15 AT29
FDI_TXP1 FDI_TX[0] PEG_RX[13] PM_SYNC TDI
C21 FDI_TX[1] PEG_RX[14] B29 TDO AR27
FDI_TXP2 D20 A30 AR29 XDP_TDI_M R284 1 2 SJ_0402
FDI_TXP3 FDI_TX[2] PEG_RX[15] TDI_M XDP_TDO_M 1 2
C18 FDI_TX[3] AN14 VCCPWRGOOD_1 TDO_M AP29
FDI_TXP4 G22 L33
FDI_TXP5 FDI_TX[4] PEG_TX#[0] DBRESET#
E20 FDI_TX[5] PEG_TX#[1] M35 DBR# AN25
C FDI_TXP6 F20 M33 AN27 C
FDI_TX[6] PEG_TX#[2] [10] H_PWRGOOD VCCPWRGOOD_0
FDI_TXP7 G19 M30
FDI_TX[7] PEG_TX#[3]
PEG_TX#[4] L31 BPM#[0] AJ22
F17 K32 PM_DRAM_PWRGD AK13 AK22
[7] FDI_FSYNC0 FDI_FSYNC[0] PEG_TX#[5] [7] PM_DRAM_PWRGD SM_DRAMPWROK BPM#[1]
[7] FDI_FSYNC1 E17 FDI_FSYNC[1] PEG_TX#[6] M29 BPM#[2] AK24
PEG_TX#[7] J31 BPM#[3] AJ24
[7] FDI_INT C17 FDI_INT PEG_TX#[8] K29 [38] H_VTTPWRGD AM15 VTTPWRGOOD BPM#[4] AJ25
PEG_TX#[9] H30 BPM#[5] AH22
[7] FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29 BPM#[6] AK23
[7] FDI_LSYNC1 D17 FDI_LSYNC[1] PEG_TX#[11] F29 AM26 TAPPWRGOOD BPM#[7] AH23
PEG_TX#[12] E28
PEG_TX#[13] D29
D27 R160 1.5K/F AL14
PEG_TX#[14] [9,27,29,30,37] PLTRST# RSTIN#
PEG_TX#[15] C26
L34 R159
PEG_TX[0] +1.5V_SUS Clarksfield/Auburndale
PEG_TX[1] M34 750/F
PEG_TX[2] M32
PEG_TX[3] L30
PEG_TX[4] M31
PEG_TX[5] K31
PEG_TX[6] M28
H31 R164
PEG_TX[7] 1.1K/F
PEG_TX[8] K28
PEG_TX[9] G30
G29 PM_DRAM_PWRGD +3.3V_RUN
PEG_TX[10]
PEG_TX[11] F28
PEG_TX[12] E27
PEG_TX[13] D28
C27 R161
PEG_TX[14] 3K/F
PEG_TX[15] C25
DBRESET# R313 1K
CRB use a 1k pull-up to 3.3V_S for DBR#
B Clarksfield/Auburndale B
TRST# use a 51ohm pull down.
Processor Processor Compensation Signals
Pullups DDR3 Compensation Signals
+1.05V_VTT
H_COMP0 SM_RCOMP_2
H_COMP1 SM_RCOMP_1
H_COMP2 SM_RCOMP_0 DDR3_DRAMRST# H_PWRGOOD
R139 R138 R131
49.9/F 49.9/F *68_NC H_COMP3 C507 C508
Layout Note: Place 0.01U 0.01U
H_CATERR# R143 R142 R141
R119 R133 R120 R122 130/F 24.9/F 100/F
these resistors
H_PROCHOT# 49.9/F 49.9/F 20/F 20/F near Processor
H_CPURST#
A A
QUANTA
Title
COMPUTER
AUBURNDA 1/4
Size Document Number Rev
UM3B/UM6B 1A
Date: Friday, October 02, 2009 Sheet 3 of 59
5 4 3 2 1
5 4 3 2 1
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
U9D
U9C
[14] M_B_DQ[63:0] SB_CK[0] W8 M_B_CLK0 [14]
SA_CK[0] AA6 M_A_CLK0 [13] SB_CK#[0] W9 M_B_CLK0# [14]
AA7 M_A_CLK0# [13] M_B_DQ0 B5 M3 M_B_CKE0 [14]
SA_CK#[0] M_B_DQ1 SB_DQ[0] SB_CKE[0]
[13] M_A_DQ[63:0] SA_CKE[0] P7 M_A_CKE0 [13] A5 SB_DQ[1]
M_A_DQ0 A10 M_B_DQ2 C3
D
M_A_DQ1 SA_DQ[0] M_B_DQ3 SB_DQ[2] D
C10 SA_DQ[1] B3 SB_DQ[3] SB_CK[1] V7 M_B_CLK1 [14]
M_A_DQ2 C7 M_B_DQ4 E4 V6 M_B_CLK1# [14]
M_A_DQ3 SA_DQ[2] M_B_DQ5 SB_DQ[4] SB_CK#[1]
A7 SA_DQ[3] SA_CK[1] Y6 M_A_CLK1 [13] A6 SB_DQ[5] SB_CKE[1] M2 M_B_CKE1 [14]
M_A_DQ4 B10 Y5 M_A_CLK1# [13] M_B_DQ6 A4
M_A_DQ5 SA_DQ[4] SA_CK#[1] M_B_DQ7 SB_DQ[6]
D10 SA_DQ[5] SA_CKE[1] P6 M_A_CKE1 [13] C4 SB_DQ[7]
M_A_DQ6 E10 M_B_DQ8 D1
M_A_DQ7 SA_DQ[6] M_B_DQ9 SB_DQ[8]
A8 SA_DQ[7]