Text preview for : icl8038.pdf part of Intersil Waveform generator
Back to : icl8038.pdf | Home
ICL8038
Data Sheet September 1998 File Number 2864.3
Precision Waveform Generator/Voltage Controlled Oscillator
The ICL8038 waveform generator is a monolithic integrated circuit capable of producing high accuracy sine, square, triangular, sawtooth and pulse waveforms with a minimum of external components. The frequency (or repetition rate) can be selected externally from 0.001Hz to more than 300kHz using either resistors or capacitors, and frequency modulation and sweeping can be accomplished with an external voltage. The ICL8038 is fabricated with advanced monolithic technology, using Schottky barrier diodes and thin film resistors, and the output is stable over a wide range of temperature and supply variations. These devices may be interfaced with phase locked loop circuitry to reduce temperature drift to less than 250ppm/oC.
Features
· Low Frequency Drift with Temperature . . . . . . .250ppm/oC · Low Distortion. . . . . . . . . . . . . . . . 1% (Sine Wave Output) · High Linearity . . . . . . . . . . . 0.1% (Triangle Wave Output) · Wide Frequency Range . . . . . . . . . . . 0.001Hz to 300kHz · Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . . 2% to 98% · High Level Outputs . . . . . . . . . . . . . . . . . . . . . . TTL to 28V · Simultaneous Sine, Square, and Triangle Wave Outputs · Easy to Use - Just a Handful of External Components Required
Ordering Information
PART NUMBER ICL8038CCPD ICL8038CCJD ICL8038BCJD ICL8038ACJD STABILITY 250ppm/oC (Typ) 250ppm/oC (Typ) 180ppm/oC (Typ) 120ppm/oC (Typ) TEMP. RANGE (oC) 0 to 70 0 to 70 0 to 70 0 to 70 PACKAGE 14 Ld PDIP 14 Ld CERDIP 14 Ld CERDIP 14 Ld CERDIP PKG. NO. E14.3 F14.3 F14.3 F14.3
Pinout
ICL8038 (PDIP, CERDIP) TOP VIEW
Functional Diagram
V+ CURRENT SOURCE #1 I 14 NC 2I 2 3 4 5 6 7 13 NC 12 SINE WAVE ADJUST 11 V- OR GND 10 TIMING CAPACITOR 9 8 SQUARE WAVE OUT FM SWEEP INPUT BUFFER BUFFER CURRENT SOURCE #2 C COMPARATOR #2 10 6 COMPARATOR #1
SINE WAVE 1 ADJUST SINE WAVE OUT TRIANGLE OUT DUTY CYCLE FREQUENCY ADJUST V+ FM BIAS
FLIP-FLOP V- OR GND 11 SINE CONVERTER
9
3
2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
ICL8038
Absolute Maximum Ratings
Supply Voltage (V- to V+). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Input Voltage (Any Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+ Input Current (Pins 4 and 5). . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 75 20 PDIP Package . . . . . . . . . . . . . . . . . . . 115 N/A Maximum Junction Temperature (Ceramic Package) . . . . . . . .175oC Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . . 0oC to 70oC
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10k, Test Circuit Unless Otherwise Specified
ICL8038CC ICL8038BC MIN TYP MAX ICL8038AC MIN TYP MAX UNITS TEST CONDITIONS
PARAMETER
SYMBOL
MIN
TYP
MAX
Supply Voltage Operating Range
VSUPPLY V+ V+, VSingle Supply
+10 ±5
12
+30 ±15 20
+10 ±5 -
12
+30 ±15 20
+10 ±5 -
12
+30 ±15 20
V V mA
Dual Supplies VSUPPLY = ±10V (Note 2)
Supply Current
ISUPPLY
FREQUENCY CHARACTERISTICS (All Waveforms) Max. Frequency of Oscillation Sweep Frequency of FM Input Sweep FM Range FM Linearity Frequency Drift with Temperature (Note 5) Frequency Drift with Supply Voltage f/T f/V fMAX fSWEEP (Note 3) 10:1 Ratio 0oC to 70oC Over Supply Voltage Range 100 10 35:1 0.5 250 0.05 100 10 35:1 0.2 180 0.05 100 10 35:1 0.2 120 0.05 % ppm/oC %/V kHz kHz
OUTPUT CHARACTERISTICS Square Wave Leakage Current Saturation Voltage Rise Time Fall Time Typical Duty Cycle Adjust (Note 6) Triangle/Sawtooth/Ramp Amplitude VTRIANGLE
IOLK VSAT tR tF D
V9 = 30V ISINK = 2mA RL = 4.7k RL = 4.7k
2
0.2 180 40
1 0.5 98
2
0.2 180 40 -
1 0.4 98
2
0.2 180 40 -
1 0.4 98
µA V ns ns %
RTRI = 100k 0.30 0.33 0.30 0.33 0.30 0.33 xVSUPPLY %
Linearity Output Impedance ZOUT IOUT = 5mA
-
0.1 200
-
-
0.05 200
-
-
0.05 200
-
2
ICL8038
Electrical Specifications
VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10k, Test Circuit Unless Otherwise Specified (Continued)
ICL8038CC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX ICL8038BC MIN TYP MAX ICL8038AC MIN TYP MAX UNITS
Sine Wave Amplitude THD VSINE THD RSINE = 100k RS = 1M (Note 4) Use Figure 4 0.2 0.22 2.0 5 0.2 0.22 1.5 3 0.2 0.22 1.0 1.5 xVSUPPLY %
THD Adjusted NOTES:
THD
-
1.5
-
-
1.0
-
-
0.8
-
%
2. RA and RB currents not included. 3. VSUPPLY = 20V; RA and RB = 10k, f 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B. 4. 82k connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use RA and RB.) 5. Figure 1, pins 7 and 8 connected, VSUPPLY = ±10V. See Typical Curves for T.C. vs VSUPPLY. 6. Not tested, typical value for design purposes only.
Test Conditions
PARAMETER Supply Current Sweep FM Range (Note 7) Frequency Drift with Temperature Frequency Drift with Supply Voltage (Note 8) Output Amplitude (Note 10) Sine Triangle Leakage Current (Off) (Note 9) Saturation Voltage (On) (Note 9) Rise and Fall Times (Note 11) Duty Cycle Adjust (Note 11) Max Min Triangle Waveform Linearity Total Harmonic Distortion 50k ~25k 10k 10k ~1.6k 50k 10k 10k 10k 10k 10k 10k 3.3nF 3.3nF 3.3nF 3.3nF Closed Closed Closed Closed Waveform at Pin 9 Waveform at Pin 9 Waveform at Pin 3 Waveform at Pin 2 10k 10k 10k 10k 10k 10k 10k 10k 10k 10k 4.7k 10k 10k 3.3nF 3.3nF 3.3nF 3.3nF 3.3nF Closed Closed Closed Closed Closed Pk-Pk Output at Pin 2 Pk-Pk Output at Pin 3 Current into Pin 9 Output (Low) at Pin 9 Waveform at Pin 9 RA 10k 10k 10k 10k RB 10k 10k 10k 10k RL 10k 10k 10k 10k C 3.3nF 3.3nF 3.3nF 3.3nF SW1 Closed Open Closed Closed MEASURE Current Into Pin 6 Frequency at Pin 9 Frequency at Pin 3 Frequency at Pin 9
NOTES: 7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (fHI) and then connecting pin 8 to pin 6 (fLO). Otherwise apply Sweep Voltage at pin 8 (2/3 VSUPPLY +2V) VSWEEP VSUPPLY where VSUPPLY is the total supply voltage. In Figure 5B, pin 8 should vary between 5.3V and 10V with respect to ground. 8. 10V V+ 30V, or ±5V VSUPPLY ±15V. 9. Oscillation can be halted by forcing pin 10 to +5V or -5V. 10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V. 11. Not tested; for design purposes only.
3
ICL8038 Test Circuit
+10V RA 10K 7 SW1 N.C. 8 ICL8038 3 RTRI 10 C 3300pF 11 12 2 82K RSINE -10V 4 5 RB 10K 6 9 RL 10K
FIGURE 1. TEST CIRCUIT
Detailed Schematic
CURRENT SOURCES REXT B Q1 Q2 5 Q3 Q4 Q7 R46 40K Q10 R3 30K Q30 Q31 Q32 Q33 Q34 Q24 9 R11 270 Q23 R12 2.7K Q25 R13 620 R16 1.8K R14 27K Q26 R15 470 Q29 Q Q27 28 R17 4.7K R18 4.7K FLIP-FLOP Q35 R41 27K Q37 Q36 Q 38 Q40 R43 27K Q39 3 R44 1K R4 100 Q11 Q12 Q13 R5 100 R6 100 Q19 Q5 COMPARATOR Q8 Q9 10 Q15 CEXT R7B 15K Q20 Q21 Q22 R10 5K Q49 R22 10K R23 2.7K R24 800 R28 33K Q50 Q51 Q52 Q53 Q54 Q55 Q56 R42 BUFFER AMPLIFIER 27K 11 2 SINE CONVERTER R38 375 R39 200 R40 5.6K R37 330 R29 33K R30 33K R31 33K Q16Q17 R7A 10K Q18 R9 5K REXT A 4 Q14 R8 5K Q47 Q46 Q45 Q44 Q43 Q42 R25 33K R26 33K R27 33K R45 33K R41 4K Q48 R19 800 R20 2.7K R21 10K Q41 R33 200 R34 375 R35 330 6 V+ R32 5.2K 1 R1 8 11K 7 R2 Q 39K 6
R36 1600
12 REXTC 82K
Application Information (See Functional Diagram)
An external capacitor C is charged and discharged by two current sources. Current source #2 is switched on and off by a flip-flop, while current source #1 is on continuously. Assuming that the flip-flop is in a state such that current source #2 is off, and the capacitor is charged with a current I, the voltage across the capacitor rises linearly with time. When this voltage reaches the level of comparator #1 (set at 2/3 of the supply voltage), the flip-flop is triggered, changes states, and releases current source #2. This current source normally carries a current 2I, thus the capacitor is discharged with a 4
net-current I and the voltage across it drops linearly with time. When it has reached the level of comparator #2 (set at 1/3 of the supply voltage), the flip-flop is triggered into its original state and the cycle starts again. Four waveforms are readily obtainable from this basic generator circuit. With the current sources set at I and 2I respectively, the charge and discharge times are equal. Thus a triangle waveform is created across the capacitor and the flip-flop produces a square wave. Both waveforms are fed to buffer stages and are available at pins 3 and 9.
ICL8038
The levels of the current sources can, however, be selected over a wide range with two external resistors. Therefore, with the two currents set at values different from I and 2I, an asymmetrical sawtooth appears at Terminal 3 and pulses with a duty cycle from less than 1% to greater than 99% are available at Terminal 9. The sine wave is created by feeding the triangle wave into a nonlinear network (sine converter). This network provides a decreasing shunt impedance as the potential of the triangle moves toward the two extremes.
C × 1/3 × V SUPPLY × R A RA × C C×V t 1 = ------------- = ------------------------------------------------------------------ = ----------------I 0.22 × V SUPPLY 0.66
The falling portion of the triangle and sine wave and the 0 state of the square wave is:
t 2 R R C C × 1/3V SUPPLY A B C×V = ------------ = ----------------------------------------------------------------------------------- = ------------------------------------V 1 V 0.66 ( 2R A R ) SUPPLY SUPPLY B 2 ( 0.22 ) ----------------------- 0.22 ----------------------R B R A
Thus a 50% duty cycle is achieved when RA = RB. If the duty cycle is to be varied over a small range about 50% only, the connection shown in Figure 3B is slightly more convenient. A 1k potentiometer may not allow the duty cycle to be adjusted through 50% on all devices. If a 50% duty cycle is required, a 2k or 5k potentiometer should be used. With two separate timing resistors, the frequency is given by:
1 1 f = --------------- = -----------------------------------------------------t1 + t2 RA C RB ------------ 1 + ------------------------- 0.66 2R A R B
Waveform Timing
The symmetry of all waveforms can be adjusted with the external timing resistors. Two possible ways to accomplish this are shown in Figure 3. Best results are obtained by keeping the timing resistors RA and RB separate (A). RA controls the rising portion of the triangle and sine wave and the 1 state of the square wave. The magnitude of the triangle waveform is set at 1/3 VSUPPLY; therefore the rising portion of the triangle is,
or, if RA = RB = R
0.33 f = ---------- (for Figure 3A) RC
FIGURE 2A. SQUARE WAVE DUTY CYCLE - 50%
FIGURE 2B. SQUARE WAVE DUTY CYCLE - 80%
FIGURE 2. PHASE RELATIONSHIP OF WAVEFORMS
V+ V+ RA 7 4 5 RB 6 9 RL 1k RA 7 4 5 RB 6 9 RL
8
ICL8038
3
8
ICL8038
3
10 C
11
12 2 82K V- OR GND
10 C
11
12 2 100K V- OR GND
FIGURE 3A.
FIGURE 3B.
FIGURE 3. POSSIBLE CONNECTIONS FOR THE EXTERNAL TIMING RESISTORS
5
ICL8038
Neither time nor frequency are dependent on supply voltage, even though none of the voltages are regulated inside the integrated circuit. This is due to the fact that both currents and thresholds are direct, linear functions of the supply voltage and thus their effects cancel. R1 and R2 are shown in the Detailed Schematic. A similar calculation holds for RB. The capacitor value should be chosen at the upper end of its possible range.
Reducing Distortion
To minimize sine wave distortion the 82k resistor between pins 11 and 12 is best made variable. With this arrangement distortion of less than 1% is achievable. To reduce this even further, two potentiometers can be connected as shown in Figure 4; this configuration allows a typical reduction of sine wave distortion close to 0.5%.
Waveform Out Level Control and Power Supplies
The waveform generator can be operated either from a single power supply (10V to 30V) or a dual power supply (±5V to ±15V). With a single power supply the average levels of the triangle and sine wave are at exactly one-half of the supply voltage, while the square wave alternates between V+ and ground. A split power supply has the advantage that all waveforms move symmetrically about ground. The square wave output is not committed. A load resistor can be connected to a different power supply, as long as the applied voltage remains within the breakdown capability of the waveform generator (30V). In this way, the square wave output can be made TTL compatible (load resistor connected to +5V) while the waveform generator itself is powered from a much higher voltage.
V+ RA 7 4 1k RB 5 6 9 RL
8
ICL8038
3
Frequency Modulation and Sweeping
10 C 10k V- OR GND 11 12 1 2 100k 10k 100k
FIGURE 4. CONNECTION TO ACHIEVE MINIMUM SINE WAVE DISTORTION
The frequency of the waveform generator is a direct function of the DC voltage at Terminal 8 (measured from V+). By altering this voltage, frequency modulation is performed. For small deviations (e.g. ±10%) the modulating signal can be applied directly to pin 8, merely providing DC decoupling with a capacitor as shown in Figure 5A. An external resistor between pins 7 and 8 is not necessary, but it can be used to increase input impedance from about 8k (pins 7 and 8 connected together), to about (R + 8k). For larger FM deviations or for frequency sweeping, the modulating signal is applied between the positive supply voltage and pin 8 (Figure 5B). In this way the entire bias for the current sources is created by the modulating signal, and a very large (e.g. 1000:1) sweep range is created (f = 0 at VSWEEP = 0). Care must be taken, however, to regulate the supply voltage; in this configuration the charge current is no longer a function of the supply voltage (yet the trigger thresholds still are) and thus the frequency becomes dependent on the supply voltage. The potential on Pin 8 may be swept down from V+ by (1/3 VSUPPLY - 2V).
Selecting RA, RB and C
For any given output frequency, there is a wide range of RC combinations that will work, however certain constraints are placed upon the magnitude of the charging current for optimum performance. At the low end, currents of less than 1µA are undesirable because circuit leakages will contribute significant errors at high temperatures. At higher currents (I > 5mA), transistor betas and saturation voltages will contribute increasingly larger errors. Optimum performance will, therefore, be obtained with charging currents of 10µA to 1mA. If pins 7 and 8 are shorted together, the magnitude of the charging current due to RA can be calculated from:
R 1 × ( V+ V- ) 1 0.22 ( V+ V- ) I = --------------------------------------- × ------- = ----------------------------------( R1 + R2 ) RA RA
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
6
ICL8038
V+ RA 7 R 8 ICL8038 3 4 RA 7 5 RB 9 15K 4 5 RB 6 9 RL
With a dual supply voltage the external capacitor on Pin 10 can be shorted to ground to halt the ICL8038 oscillation. Figure 7 shows a FET switch, diode ANDed with an input strobe signal to allow the output to always start on the same slope.
V+
FM
10 C
11
12 2 81K V- OR GND
8
ICL8038
1N914
FIGURE 5A. CONNECTIONS FOR FREQUENCY MODULATION
11
10
2 1N914
C V+ SWEEP VOLTAGE 4 RA 5 RB 6 9 RL
2N4392 -15V 100K OFF ON
STROBE
+15V (+10V) -15V (-10V)
FIGURE 7. STROBE TONE BURST GENERATOR
8 ICL8038 3
10 C
11
12 2 81K V- OR GND
FIGURE 5B. CONNECTIONS FOR FREQUENCY SWEEP FIGURE 5.
To obtain a 1000:1 Sweep Range on the ICL8038 the voltage across external resistors RA and RB must decrease to nearly zero. This requires that the highest voltage on control Pin 8 exceed the voltage at the top of RA and RB by a few hundred mV. The Circuit of Figure 8 achieves this by using a diode to lower the effective supply voltage on the ICL8038. The large resistor on pin 5 helps reduce duty cycle variations with sweep. The linearity of input sweep voltage versus output frequency can be significantly improved by using an op amp as shown in Figure 10.
+10V 1N457 DUTY CYCLE 0.1µF 1K 4.7K 15K 4.7K
Typical Applications
The sine wave output has a relatively high output impedance (1k Typ). The circuit of Figure 6 provides buffering, gain and amplitude adjustment. A simple op amp follower could also be used.
V+ RA 7 4 5 RB 6 2 AMPLITUDE + 741
5
4
6
9
100K 8 ICL8038
-
10K FREQ. 20K
8
ICL8038
3
10 C
11
4.7K 20K V-
10
11 0.0047µF
12 2 DISTORTION 100K -10V
15M
FIGURE 6. SINE WAVE OUTPUT BUFFER AMPLIFIERS
FIGURE 8. VARIABLE AUDIO OSCILLATOR, 20Hz TO 20kHzY
7
ICL8038
DUTY CYCLE FREQUENCY ADJUST 7 4 5 6 3 SINE WAVE OUT 9 ICL8038 2 V2+
R1 FM BIAS SQUARE WAVE OUT
TRIANGLE OUT
V1+
INPUT
VCO IN PHASE DETECTOR
AMPLIFIER
DEMODULATED FM R2
8
10
11
12
1
SINE WAVE ADJ.
LOW PASS FILTER
TIMING CAP.
SINE WAVE ADJ. V-/GND
FIGURE 9. WAVEFORM GENERATOR USED AS STABLE VCO IN A PHASE-LOCKED LOOP
HIGH FREQUENCY SYMMETRY 1N753A (6.2V) 1k 1,000pF 4 +15V 5 6 9 500 4.7k 10k 4.7k 1M 100k LOW FREQUENCY SYMMETRY SINE WAVE OUTPUT 100k
741 + -VIN P4
1k 8
ICL8038 FUNCTION GENERATOR
3
+15V
+ 741 +
10 10k OFFSET 3,900pF
11
12 2
50µF 100k 15V SINE WAVE DISTORTION -15V
FIGURE 10. LINEAR VOLTAGE CONTROLLED OSCILLATOR
Use in Phase Locked Loops
Its high frequency stability makes the ICL8038 an ideal building block for a phase locked loop as shown in Figure 9. In this application the remaining functional blocks, the phase detector and the amplifier, can be formed by a number of available ICs (e.g., MC4344, NE562). In order to match these building blocks to each other, two steps must be taken. First, two different supply voltages are used and the square wave output is returned to the supply of the phase detector. This assures that the VCO input voltage will not exceed the capabilities of the phase detector. If a smaller VCO signal is required, a simple resistive voltage divider is connected between pin 9 of the waveform generator and the VCO input of the phase detector. Second, the DC output level of the amplifier must be made compatible to the DC level required at the FM input of the waveform generator (pin 8, 0.8V+). The simplest solution here is to provide a voltage divider to V+ (R1, R2 as shown) if the amplifier has a lower output level, or to ground if its level is higher. The divider can be made part of the low-pass filter. This application not only provides for a free-running frequency with very low temperature drift, but is also has the unique feature of producing a large reconstituted sinewave signal with a frequency identical to that at the input. For further information, see Intersil Application Note AN013, "Everything You Always Wanted to Know About the ICL8038".
8
ICL8038 Definition of Terms
Supply Voltage (VSUPPLY). The total supply voltage from V+ to V-. Supply Current. The supply current required from the power supply to operate the device, excluding load currents and the currents through RA and RB. Frequency Range. The frequency range at the square wave output through which circuit operation is guaranteed. Sweep FM Range. The ratio of maximum frequency to minimum frequency which can be obtained by applying a sweep voltage to pin 8. For correct operation, the sweep voltage should be within the range: (2/3 VSUPPLY + 2V) < VSWEEP < VSUPPLY FM Linearity. The percentage deviation from the best fit straight line on the control voltage versus output frequency curve. Output Amplitude. The peak-to-peak signal amplitude appearing at the outputs. Saturation Voltage. The output voltage at the collector of Q23 when this transistor is turned on. It is measured for a sink current of 2mA. Rise and Fall Times. The time required for the square wave output to change from 10% to 90%, or 90% to 10%, of its final value. Triangle Waveform Linearity. The percentage deviation from the best fit straight line on the rising and falling triangle waveform. Total Harmonic Distortion. The total harmonic distortion at the sine wave output.
Typical Performance Curves
20 1.03 1.02 1.01 1.00 0.99 0.98
15
-55oC
125oC 10 25oC
5
5
10
15
20
25
30
NORMALIZED FREQUENCY
SUPPLY CURRENT (mA)
5
10
15
20
25
30
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
1.03 1.02 10 1.01 30 1.00 0.99 50 0.98 0 20 10 TIME (ns) 20 100 150 200
FIGURE 12. FREQUENCY vs SUPPLY VOLTAGE
NORMALIZED FREQUENCY
125oC 25oC -55oC
RISE TIME
125oC 25oC FALL TIME -55oC
30
-50
-25
0
25
75
125
0
2
4
6
8
10
TEMPERATURE (oC)
LOAD RESISTANCE (k)
FIGURE 13. FREQUENCY vs TEMPERATURE
FIGURE 14. SQUARE WAVE OUTPUT RISE/FALL TIME vs LOAD RESISTANCE
9
ICL8038 Typical Performance Curves (Continued)
NORMALIZED PEAK OUTPUT VOLTAGE 2 1.0 LOAD CURRENT TO V 0.9 125oC 25oC -55oC
SATURATION VOLTAGE
1.5 125oC 1.0 25oC -55oC 0.5
0.8 LOAD CURRENT TO V+
0 0 2 4 6 8 10 LOAD CURRENT (mA)
0
2
4
6
8
10
12
14
16
18
20
LOAD CURRENT (mA)
FIGURE 15. SQUARE WAVE SATURATION VOLTAGE vs LOAD CURRENT
FIGURE 16. TRIANGLE WAVE OUTPUT VOLTAGE vs LOAD CURRENT
1.2 NORMALIZED OUTPUT VOLTAGE 1.1 1.0 0.9 0.8 0.7 0.6 10 100 1K 10K 100K 1M FREQUENCY (Hz)
10.0
LINEARITY (%)
1.0
0.1
0.01 10 100 1K 10K 100K 1M FREQUENCY (Hz)
FIGURE 17. TRIANGLE WAVE OUTPUT VOLTAGE vs FREQUENCY
FIGURE 18. TRIANGLE WAVE LINEARITY vs FREQUENCY
1.1 NORMALIZED OUTPUT VOLTAGE
12 10 DISTORTION (%)
1.0
8 6 4 UNADJUSTED 2 0 10 100 1K 10K 100K 1M FREQUENCY (Hz) ADJUSTED
0.9
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
FIGURE 19. SINE WAVE OUTPUT VOLTAGE vs FREQUENCY
FIGURE 20. SINE WAVE DISTORTION vs FREQUENCY
10