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PIMN31
500 mA, 50 V NPN/NPN double resistor-equipped transistor;
R1 = 1 k, R2 = 10 k
Rev. 01 -- 19 June 2007 Product data sheet
1. Product profile
1.1 General description
500 mA, 50 V NPN/NPN double Resistor-Equipped Transistor (RET) in a small
SOT457 (SC-74) Surface-Mounted Device (SMD) plastic package.
1.2 Features
I 500 mA output current capability
I Built-in bias resistors
I Simplifies circuit design
I Reduces component count
I Reduces pick and place costs
I AEC-Q101 qualified
1.3 Applications
I Digital application in automotive and industrial segments
I Switching loads
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
VCEO collector-emitter voltage open base - - 50 V
IO output current - - 500 mA
R1 bias resistor 1 (input) 0.7 1 1.3 k
R2/R1 bias resistor ratio 9 10 11
NXP Semiconductors PIMN31
500 mA, 50 V NPN/NPN double RET; R1 = 1 k, R2 = 10 k
2. Pinning information
Table 2. Pinning
Pin Description Simplified outline Symbol
1 GND (emitter) TR1
6 5 4 6 5 4
2 input (base) TR1
3 output (collector) TR2
R1 R2
4 GND (emitter) TR2 1 2 3
TR2
5 input (base) TR2 TR1
6 output (collector) TR1 R2 R1
1 2 3
sym063
3. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
PIMN31 SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
4. Marking
Table 4. Marking codes
Type number Marking code
PIMN31 4E
5. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor
VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 5 V
VI input voltage
positive - +12 V
negative - -5 V
IO output current - 500 mA
Ptot total power dissipation Tamb 25