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54F 74F193 Up Down Binary Counter with Separate Up Down Clocks
November 1994
54F 74F193 Up Down Binary Counter
with Separate Up Down Clocks
General Description
The 'F193 is an up down modulo-16 binary counter Sepa- Individual preset inputs allow the circuit to be used as a
rate Count Up and Count Down Clocks are used and in programmable counter Both the Parallel Load (PL) and the
either counting mode the circuits operate synchronously Master Reset (MR) inputs asynchronously override the
The outputs change state synchronously with the LOW-to- clocks
HIGH transitions on the clock inputs Separate Terminal
Count Up and Terminal Count Down outputs are provided Features
that are used as the clocks for subsequent stages without Y Guaranteed 4000V minimum ESD protection
extra logic thus simplifying multi-stage counter designs
Package
Commercial Military Package Description
Number
74F193PC N16E 16-Lead (0 300 Wide) Molded Dual-In-Line
54F193DM (Note 2) J16A 16-Lead Ceramic Dual-In-Line
74F193SC (Note 1) M16A 16-Lead (0 150 Wide) Molded Small Outline JEDEC
74F193SJ (Note 1) M16D 16-Lead (0 300 Wide) Molded Small Outline EIAJ
54F193FM (Note 2) W16A 16-Lead Cerpack
54F193LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols Connection Diagrams
Pin Assignment Pin Assignment
for DIP SOIC and Flatpak for LCC
TL F 9497