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SN54/74LS640
SN54/74LS641
OCTAL BUS TRANSCEIVERS SN54/74LS642
SN54/74LS645
These octal bus transceivers are designed for asynchronous two-way
communication between data buses. Control function implementation
minimizes external timing requirements. These circuits allow data transmis-
sion from the A bus to B or from the B bus to A bus depending upon the logic
level of the direction control (DIR) input. Enable input (G) can disable the OCTAL BUS TRANSCEIVERS
device so that the buses are effectively isolated.
LOW POWER SCHOTTKY
DEVICE OUTPUT LOGIC
LS640 3-State Inverting
LS641 Open-Collector True
LS642 Open-Collector Inverting
LS645 3-State True
J SUFFIX
CERAMIC
FUNCTION TABLE CASE 732-03
20
CONTROL OPERATION 1
INPUTS
LS640 LS641
G DIR LS642 LS645 N SUFFIX
PLASTIC
L L B data to A bus B data to A bus
CASE 738-03
20
L H A data to B bus A data to B bus
1
H X Isolation Isolation
H = HIGH Level, L = LOW Level, X = Irrelevant
DW SUFFIX
SOIC
20
CASE 751D-03
1
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC
CONNECTION DIAGRAMS DIP (TOP VIEW)
ENABLE ENABLE
VCC G B1 B2 B3 B4 B5 B6 B7 B8 VCC G B1 B2 B3 B4 B5 B6 B7 B8
20 19 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10
DIR A1 A2 A3 A4 A5 A6 A7 A8 GND DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
SN54 / 74LS640 SN54 / 74LS641
SN54 / 74LS642 SN54 / 74LS645
FAST AND LS TTL DATA
5-1
SN54/74LS640