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Enhanced Mixed Frequency Mode GreenLineTM PWM Controller:
Fixed Frequency, Variable Frequency, Standby Mode
The MC44603A is an enhanced high performance controller that is specifically designed for off­line and dc­to­dc converter applications. This device has the unique ability of automatically changing operating modes if the converter output is overloaded, unloaded, or shorted, offering the designer additional protection for increased system reliability. The MC44603A has several distinguishing features when compared to conventional SMPS controllers. These features consist of a foldback facility for overload protection, a standby mode when the converter output is slightly loaded, a demagnetization detection for reduced switching stresses on transistor and diodes, and a high current totem pole output ideally suited for driving a power MOSFET. It can also be used for driving a bipolar transistor in low power converters (< 150 W). It is optimized to operate in discontinuous mode but can also operate in continuous mode. Its advanced design allows use in current mode or voltage mode control applications.
Current or Voltage Mode Controller

MC44603A
MIXED FREQUENCY MODE GREENLINE PWM* CONTROLLER:
VARIABLE FREQUENCY, FIXED FREQUENCY, STANDBY MODE
* PWM = Pulse Width Modulation

16 1

P SUFFIX PLASTIC PACKAGE CASE 648

· · · · · · · · · · · · · · · · · · · · ·

Operation up to 250 kHz Output Switching Frequency Inherent Feed Forward Compensation Latching PWM for Cycle­by­Cycle Current Limiting Oscillator with Precise Frequency Control Externally Programmable Reference Current Secondary or Primary Sensing Synchronization Facility High Current Totem Pole Output Undervoltage Lockout with Hysteresis Overvoltage Protection Against Open Current and Open Voltage Loop Protection Against Short Circuit on Oscillator Pin Fully Programmable Foldback Soft­Start Feature Accurate Maximum Duty Cycle Setting Demagnetization (Zero Current Detection) Protection Internally Trimmed Reference Enhanced Output Drive Low Startup and Operating Current Fully Programmable Standby Mode Controlled Frequency Reduction in Standby Mode Low dV/dT for Low EMI Radiations

16 1

High Flexibility

DW SUFFIX PLASTIC PACKAGE CASE 751G (SOP­16L)

PIN CONNECTIONS
VCC VC Output Gnd Foldback Input Overvoltage Protection (OVP) Current Sense Input Demag Detection 1 2 3 4 5 6 7 8 16 Rref RFrequency Standby Voltage Feedback 14 Input 15 13 Error Amp Output 12 RPower Standby 11 Soft-Start/Dmax/ Voltage Mode

Safety/Protection Features

10 CT 9 Sync Input

(Top View)

GreenLine Controller: Low Power Consumption in Standby Mode ORDERING INFORMATION
Device MC44603AP MC44603ADW TA = ­25° to +85°C Operating Temperature Range Package Plastic DIP­16 SOP­16L

GreenLine is a trademark of Motorola, Inc.
© Semiconductor Components Industries, LLC, 2001

1

August, 2001 ­ Rev. 2

Publication Order Number: MC44603A/D

MC44603A
MAXIMUM RATINGS
Rating Total Power Supply and Zener Current Supply Voltage with Respect to Ground (Pin 4) Output Current (Note 1) Source Sink Output Energy (Capacitive Load per Cycle) RF Stby, CT, Soft­Start, Rref, RP Stby Inputs Foldback Input, Current Sense Input, E/A Output, Voltage Feedback Input, Overvoltage Protection, Synchronization Input Synchronization Input High State Voltage Low State Reverse Current Demagnetization Detection Input Current Source Sink Error Amplifier Output Sink Current Power Dissipation and Thermal Characteristics P Suffix, Dual­In­Line, Case 648 Maximum Power Dissipation at TA = 85°C Thermal Resistance, Junction­to­Air DW Suffix, Surface Mount, Case 751G Maximum Power Dissipation at TA = 85°C Thermal Resistance, Junction­to­Air Operating Junction Temperature Operating Ambient Temperature
NOTES: 1. Maximum package power dissipation limits must be observed. 2. ESD data available upon request.

Symbol (ICC + IZ) VC VCC IO(Source) IO(Sink) W Vin Vin

Value 30 18

Unit mA V mA

­750 750 5.0 ­0.3 to 5.5 ­0.3 to VCC + 0.3 µJ V V

VIH VIL Idemag­ib (Source) Idemag­ib (Sink) IE/A (Sink)

VCC + 0.3 ­20 ­4.0 10 20

V mA mA

mA

PD RJA PD RJA TJ TA

0.6 100 0.45 145 150 ­25 to +85

W °C/W W °C/W °C °C

ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V, [Note 3], Rref = 10 k, CT = 820 pF, for typical values TA = 25°C,
for min/max values TA = ­25° to +85°C [Note 4], unless otherwise noted.) Characteristic OUTPUT SECTION Output Voltage (Note 5) Low State (ISink = 100 mA) Low State (ISink = 500 mA) High State (ISource = 200 mA) High State (ISource = 500 mA) Output Voltage During Initialization Phase Out ut VCC = 0 to 1.0 V, ISink = 10 µA , µ VCC = 1.0 to 5.0 V ISink = 100 µA V, A 5.0 V, 1.0 VCC = 5 0 to 13 V ISink = 1 0 mA Output Voltage Rising Edge Slew­Rate (CL = 1.0 nF, TJ = 25°C) Output Voltage Falling Edge Slew­Rate (CL = 1.0 nF, TJ = 25°C) ERROR AMPLIFIER SECTION Voltage Feedback Input (VE/A out = 2.5 V) Input Bias Current (VFB = 2.5 V) Open Loop Voltage Gain (VE/A out = 2.0 to 4.0 V) VFB IFB­ib AVOL 2.42 ­2.0 65 2.5 ­0.6 70 2.58 ­ ­ V µA dB V VOL VOH VOL ­ ­ ­ dVo/dT dVo/dT ­ ­ ­ 0.1 0.1 01 300 ­300 1.0 1.0 1.0 10 ­ ­ V/µs V/µs ­ ­ ­ ­ 1.0 1.4 1.5 2.0 1.2 2.0 2.0 2.7 V Symbol Min Typ Max Unit

NOTES: 3. Adjust VCC above the startup threshold before setting to 12 V. 4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 5. VC must be greater than 5.0 V.

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MC44603A
ELECTRICAL CHARACTERISTICS (continued) (VCC and VC = 12 V, [Note 3], Rref = 10 k, CT = 820 pF, for typical values TA = 25°C,
for min/max values TA = ­25° to +85°C [Note 4], unless otherwise noted.) Characteristic ERROR AMPLIFIER SECTION (continued) Unity Gain Bandwidth TJ = 25°C TJ = ­25° to +85°C Voltage Feedback Input Line Regulation (VCC = 10 to 15 V) Output Current Sink (VE/A out = 1.5 V, VFB = 2.7 V) TA = ­25° to +85°C Source (VE/A out = 5.0 V, VFB = 2.3 V) TA = ­25° to +85°C Output Voltage Swing High State (IE/A out (source) = 0.5 mA, VFB = 2.3 V) Low State (IE/A out (sink) = 0.33 mA, VFB = 2.7 V) REFERENCE SECTION Reference Output Voltage (VCC = 10 to 15 V) Reference Current Range (Iref = Vref/Rref, R = 5.0 k to 25 k) Reference Voltage Over Iref Range OSCILLATOR AND SYNCHRONIZATION SECTION Frequency TA = 0° to +70°C TA = ­25° to +85°C Frequency Change with Voltage (VCC = 10 to 15 V) Frequency Change with Temperature (TA = ­25° to +85°C) Oscillator Voltage Swing (Peak­to­Peak) Ratio Charge Current/Reference Current TA = 0° to +70°C (VCT = 2.0 V) TA = ­25° to +85°C Fixed Maximum Duty Cycle = Idischarge/(Idischarge + Icharge) Ratio Standby Discharge Current versus IR F Stby (Note 6) TA = 0° to +70°C TA = ­25° to +85°C (Note 8) VR F Stby (IR F Stby = 100 µA) Frequency in Standby Mode (RF Stby (Pin 15) = 25 k) Current Range Synchronization Input Threshold Voltage (Note 7) Synchronization Input Current Minimum Synchronization Pulse Width (Note 8) UNDERVOLTAGE LOCKOUT SECTION Startup Threshold Output Disable Voltage After Threshold Turn­On (UVLO 1) TA = 0° to +70°C TA = ­25° to +85°C Reference Disable Voltage After Threshold Turn­On (UVLO 2) Vstup­th Vdisable1 8.6 8.3 Vdisable2 7.0 9.0 ­ 7.5 9.4 9.6 8.0 V 13.6 14.5 15.4 V V fOSC 44.5 44 fOSC/V fOSC/T VOSC(pp) Icharge/Iref 0.375 0.37 D Idisch­Stby/ IR F Stby VR F Stby FStby IR F Stby VinthH VinthL ISync­in tSync 78 0.46 0.43 2.4 18 ­200 3.2 0.45 ­5.0 ­ 0.4 ­ 80 0.53 ­ 2.5 21 ­ 3.7 0.7 ­ ­ 0.425 0.43 82 0.6 0.63 2.6 24 ­50 4.3 0.9 0 0.5 V kHz µA V µA µs % ­ ­ ­ 1.65 48 ­ 0.05 0.05 1.8 51.5 52 ­ ­ 1.95 %/V %/°C V ­ kHz Vref Iref Vref 2.4 ­500 ­40 2.5 ­ ­ 2.6 ­100 40 V µA mV BW ­ ­ VFBline­reg ISink ISource ­10 2.0 ­2.0 4.0 ­ ­ 12 ­ ­ 5.5 10 ­ ­0.2 V VOH VOL 5.5 ­ 6.5 1.0 7.5 1.1 mV mA MHz Symbol Min Typ Max Unit

NOTES: 13. Adjust VCC above the startup threshold before setting to 12 V. 14. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 16. Standby is disabled for VR P Stby < 25 mV typical. 17. If not used, Synchronization input must be connected to Ground. 18. Synchronization Pulse Width must be shorter than tOSC = 1/fOSC.

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MC44603A
ELECTRICAL CHARACTERISTICS (continued) (VCC and VC = 12 V, [Note 3], Rref = 10 k, CT = 820 pF, for typical values TA = 25°C,
for min/max values TA = ­25° to +85°C [Note 4], unless otherwise noted.) Characteristic DEMAGNETIZATION DETECTION SECTION (Note 9) Demagnetization Detect Input Demagnetization Comparator Threshold (VPin 9 Decreasing) Propagation Delay (Input to Output, Low to High) Input Bias Current (Vdemag = 65 mV) Negative Clamp Level (Idemag = ­2.0 mA) Positive Clamp Level (Idemag = 2.0 mA) SOFT­START SECTION (Note 11) Ratio Charge Current/Iref TA = 0° to +70°C TA = ­25° to +85°C Discharge Current (Vsoft­start = 1.0 V) Clamp Level Duty Cycle (Rsoft­start = 12 k) Duty Cycle (Vsoft­start (Pin 11) = 0.1 V) OVERVOLTAGE SECTION Protection Threshold Level on VOVP Propagation Delay (VOVP > 2.58 V to Vout Low) Protection Level on VCC TA = 0° to +70°C TA = ­25° to +85°C Input Resistance TA = 0° to +70°C TA = ­25° to +85°C FOLDBACK SECTION (Note 10) Current Sense Voltage Threshold (Vfoldback (Pin 5) = 0.9 V) Foldback Input Bias Current (Vfoldback (Pin 5) = 0 V) STANDBY SECTION Ratio IR P Stby/Iref TA = 0° to +70°C TA = ­25° to +85°C Ratio Hysteresis (Vh Required to Return to Normal Operation from Standby Operation) TA = 0° to +70°C TA = ­25° to +85°C Current Sense Voltage Threshold (VR P Stby (Pin 12) = 1.0 V) CURRENT SENSE SECTION Maximum Current Sense Input Threshold (Vfeedback (Pin 14) = 2.3 V and Vfoldback (Pin 6) = 1.2 V) Input Bias Current Propagation Delay (Current Sense Input to Output at VTH of MOS transistor = 3.0 V) TOTAL DEVICE Power Supply Current Startup (VCC = 13 V with VCC Increasing) Operating TA = ­25° to +85°C (Note 3) Power Supply Zener Voltage (ICC = 25 mA) Thermal Shutdown ICC ­ 13 VZ ­ 18.5 ­ 0.3 17 ­ 155 0.45 20 ­ ­ V °C mA VCS­th ICS­ib ­ 0.96 ­10 ­ 1.0 ­2.0 120 1.04 ­ 200 V µA ns IR P Stby/Iref 0.37 0.36 Vh/VR P Stby 1.42 1.4 VCS­Stby 0.28 1.5 ­ 0.31 1.58 1.6 0.34 V 0.4 ­ 0.43 0.44 ­ ­ VCS­th Ifoldback­lb 0.86 ­6.0 0.89 ­2.0 0.9 ­ V µA VCC prot 16.1 15.9 ­ 1.5 1.4 2.0 ­ 3.0 3.4 17 ­ 17.9 18.1 k VOVP­th 2.42 1.0 2.5 ­ 2.58 3.0 V µs V Iss(ch)/Iref 0.37 0.36 Idischarge Vss(CL) Dsoft­start 12k Dsoft­start 1.5 2.2 36 ­ 0.4 ­ 5.0 2.4 42 ­ 0.43 0.44 ­ 2.6 49 0 mA V % ­ Vdemag­th ­ Idemag­lb CL(neg) CL(pos) 50 ­ ­0.5 ­ ­ 65 0.25 ­ ­0.38 0.72 80 ­ ­ ­ ­ mV µs µA V V Symbol Min Typ Max Unit

NOTES: 13. Adjust VCC above the startup threshold before setting to 12 V. 14. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 19. This function can be inhibited by connecting Pin 8 to Gnd. This allows a continuous current mode operation. 10. This function can be inhibited by connecting Pin 5 to VCC. 11. The MC44603A can be shut down by connecting the Soft­Start pin (Pin 11) to Ground.

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MC44603A
Representative Block Diagram
RF Stby RF Stby 15 16 Vref Negative Active Clamp Demag Detect 8 Sync Input 9 0.4 Iref 1.0 V 1.6 V + 3.6 V R R S S Q VOSC S R 0.4 Iref Vref Vref 0.4 Iref 0.6 Iref 0.8 Iref Vref IDischarge Vref 0.25 IF Stby Vref 0.2 Iref Q 2.0 µs Delay Vref 5.0 µs Delay 11.6 k 2.0 k + 2.5 V OVP 6 ROVP VOVP Out Vref Output 3 4 Gnd Q VC 2 Q R S UVLO2 VCC + 65 mV + 3.7 V + 0.7 V VDemag Out Synchro VOSC prot Vref + Reference Block Iref IF Stby 18.0 V VCC To Power Transformer 1 Rref

Vaux

Vref

14.5 V/7.5 V

CT 10 CT

Thermal Shutdown Vref 0.4 Iref

VCC

RPwr Stby 12 Feedback 14 Compensation 13 5 Foldback Input

VCC 1.0 mA + 2R

IDischarge/2

Current Mirror X2

+ 1.6 V

2.5 V

Error Amplifier

Current Sense Input R 1.0 V 2.4 V 5.0 mA 7 UVLO1 VCC + 9.0 V

11 SS/Dmax/VM = Sink only = Positive True Logic RSS CSS

This device contains 243 active transistors.

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MC44603A
100 Rref , TIMING RESISTANCE (k ) CT = 100 pF CT = 500 pF 10000 C T, TIMING CAPACITOR (pF) VCC = 16 V TA = 25°C VCC = 16 V TA = 25°C Rref = 10 k RF Stby = 2.0 k RF Stby = 5.0 k RF Stby = 27 k RF Stby = 100 k 100 k fOSC, Oscillator Frequency (Hz) 1.0 M

CT = 1000 pF 10

1000

CT = 2200 pF 100 k fOSC, Oscillator Frequency (Hz) 1.0 M 300 10 k

3.0 10 k

Figure 1. Timing Resistor versus Oscillator Frequency

Figure 2. Standby Mode Timing Capacitor versus Oscillator Frequency

51 50 49 48 47 46 45 44 -50 -25 0 25 50 VCC = 12 V Rref = 10 k CT = 820 pF 75 100 TA, AMBIENT TEMPERATURE (°C)

Icharge/Iref = RATIO CHARGE CURRENT/ REFERENCE CURRENT

f OSC, OSCILLATOR FREQUENCY (kHz)

52

0.43 0.42 0.41 0.40 0.39 0.38 0.37 -50 -25 0 25 50 VCC = 12 V Rref = 10 k CT = 820 pF 75 100 TA, AMBIENT TEMPERATURE (°C)

Figure 3. Oscillator Frequency versus Temperature

Figure 4. Ratio Charge Current/Reference Current versus Temperature

600 I O , OUTPUT CURRENT (mA) 400 200 0 Current VCC = 12 V CL = 2200 pF TA = 25°C

70 VO , OUTPUT DRIVE VOLTAGE (V) 60 50 40 30 Voltage 20 10 0

70 VO , OUTPUT DRIVE VOLTAGE (V) 60 VCC = 12 V CL = 2200 pF TA = 25°C Current

300 ICC, SUPPLY CURRENT (mA) 200 100 0 -100 -200 VO ICC 1.0 µs/Div Voltage -300 -400 -500

50 40 30 20 10 0

-200 -400 -600 -800

-1000 1.0 µs/Div

-10

-10

Figure 5. Output Waveform

Figure 6. Output Cross Conduction

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MC44603A
500 Idisch , DISCHARGE CURRENT (µA) 475 450 425 400 375 350 325 300 -50 -25 0 25 50 VCC = 12 V Rref = 10 k CT = 820 pF 75 100 VOH , SOURCE OUTPUT SATURATION VOLTAGE (V) 2.5

2.0

1.5 VCC = 12 V Rref = 10 k CT = 820 pF TA = 25°C 0 100 200 300 400 500

1.0

TA, AMBIENT TEMPERATURE (°C)

Isource, OUTPUT SOURCE CURRENT (mA)

Figure 7. Oscillator Discharge Current versus Temperature

Figure 8. Source Output Saturation Voltage versus Load Current

VOL , SINK OUTPUT SATURATION VOLTAGE (V)

2.0 1.6 1.2 0.8 0.4 0 0 TA = 25°C VCC = 12 V 80 µs Pulsed Load 120 Hz Rate 100 200 300 400 500 Sink Saturation (Load to VCC) GAIN (dB)

80 60 40 20 0 -20

50

100

101

10 2 f, FREQUENCY (kHz)

103

-40 104

Isink, SINK OUTPUT CURRENT (mA)

Figure 9. Sink Output Saturation Voltage versus Sink Current
Vdemag-th, DEMAG COMPARATOR THRESHOLD (mV)

Figure 10. Error Amplifier Gain and Phase versus Frequency

VFB, VOLTAGE FEEDBACK INPUT (V)

2.60 VCC = 12 V G = 10 VO = 2.0 to 4.0 V RL = 100 k

80 75 70 65 60 55 50 -50 -25 0 25 50 75 100 VCC = 12 V

2.55

2.50

2.45

2.40 -50

-25

0

25

50

75

100

TA, AMBIENT TEMPERATURE (°C)

TA, AMBIENT TEMPERATURE (°C)

Figure 11. Voltage Feedback Input versus Temperature

Figure 12. Demag Comparator Threshold versus Temperature

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PHASE (DEGREES)

VCC = 12 V G = 10 Vin = 30 mV VO = 2.0 to 4.0 V RL = 100 k TA = 25°C

140

MC44603A
R JA , THERMAL RESISTANCE JUNCTION-TO-AIR (° C/W)

Printed circuit board heatsink example L

3.1

80 60 40 20 0 PD(max) for TA = 70°C RJA

2.0 oz Copper

4.0 3.0 2.0 1.0 0 50

3.0

L 3.0 mm Graphs represent symmetrical layout

2.9

VCC = 12 V Rref = 10 k CT = 820 pF -25 0 25 50 75 100

2.8 -50

0

10

TA, AMBIENT TEMPERATURE (°C)

20 30 L, LENGTH OF COPPER (mm)

40

Figure 13. Current Sense Gain versus Temperature

Figure 14. Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length

140 PROPAGATION DELAY (ns)

0.35 0.30 STARTUP CURRENT (mA)

120

0.25 0.20 0.15 0.10 0.05 0 0 2.0 4.0 6.0 8.0 Rref = 10 k CT = 820 pF

100

VCC = 12 V Rref = 10 k CT = 820 pF -25 0 25 50 75 100

80 -50

10

12

TA, AMBIENT TEMPERATURE (°C)

VCC, SUPPLY VOLTAGE (V)

Figure 15. Propagation Delay Current Sense Input to Output versus Temperature

Figure 16. Startup Current versus VCC

16 ICC , SUPPLY CURRENT (mA) 14 12 10 8.0 6.0 4.0 2.0 0 2.0 TA = 25°C Rref = 10 k CT = 820 pF VFB = 0 V VCS = 0 V 4.0 6.0 8.0 10 12 14 16 VZ, ZENER VOLTAGE (V)

21.5 21.0 20.5 20.0 19.5 19.0 -50 ICC = 25 mA

-25

0

25

50

75

100

VCC, SUPPLY VOLTAGE (V)

TA, AMBIENT TEMPERATURE (°C)

Figure 17. Supply Current versus Supply Voltage

Figure 18. Power Supply Zener Voltage versus Temperature

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P D, MAXIMUM POWER DISSIPATION (W) 14

3.2 A VCS, CURRENT SENSE GAIN

100

5.0

ÉÉÉÉÉ ÉÉÉÉÉ

MC44603A
Vstup-th , STARTUP THRESHOLD VOLTAGE (V) 15.5 9.50

14.5 VCC Increasing 14.0

Vdisable1 , UVLO1 (V)

15.0

9.25

9.00 VCC Decreasing 8.55

13.5 -50

-25

0

25

50

75

100

8.50 -50

-25

0

25

50

75

100

TA, AMBIENT TEMPERATURE (°C)

TA, AMBIENT TEMPERATURE (°C)

Figure 19. Startup Threshold Voltage versus Temperature

Figure 20. Disable Voltage After Threshold Turn­On (UVLO1) versus Temperature

7.8 Vdisable2 , UVLO2 (V) 7.6 7.4 7.2 7.0 6.8 -50 -25 0 25 50 75 100 VCC Decreasing

VOVP-th, PROTECTION THRESHOLD LEVEL (V)

8.0

2.60 2.55 2.50 2.45 2.40 2.35 2.30 -50 -25 0 25 50 75 100 VCC = 12 V

TA, AMBIENT TEMPERATURE (°C)

TA, AMBIENT TEMPERATURE (°C)

Figure 21. Disable Voltage After Threshold Turn­On (UVLO2) versus Temperature

Figure 22. Protection Threshold Level on VOVP versus Temperature

18 VCC prot , PROTECTION LEVEL (V) PROPAGATION DELAY (µs) Rref = 10 k CT = 820 pF Pin 6 Open

3.0

17.5

2.5

17

2.0 VCC = 12 V Rref = 10 k CT = 820 pF -25 0 25 50 75 100

16.5

1.5

16 -50

-25

0

25

50

75

100

1.0 -50

TA, AMBIENT TEMPERATURE (°C)

TA, AMBIENT TEMPERATURE (°C)

Figure 23. Protection Level on VCC versus Temperature

Figure 24. Propagation Delay (VOVP > 2.58 V to Vout Low) versus Temperature

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MC44603A
I R P Stby , STANDBY REFERENCE CURRENT (µA) VCS-stby , CURRENT SENSE THRESHOLD STANDBY MODE (V) 270 265 260 255 250 245 240 235 230 -50 -25 0 25 50 75 100 VR P Stdby (Pin 12) Voltage Increasing 0.33

0.32

0.31

0.30 -50

VCC = 12 V Rref = 10 k CT = 820 pF Pin 12 Clamped at 1.0 V -25 0 25 50 75 100 TA, AMBIENT TEMPERATURE (°C)

TA, AMBIENT TEMPERATURE (°C)

Figure 25. Standby Reference Current versus Temperature

Figure 26. Current Sense Voltage Threshold Standby Mode versus Temperature

PIN FUNCTION DESCRIPTION
Pin 1 2 3 4 5 VCC VC Output Gnd Foldback Input Name Description This pin is the positive supply of the IC. The operating voltage range after startup is 9.0 to 14.5 V. The output high state (VOH) is set by the voltage applied to this pin. With a separate connection to the power source, it can reduce the effects of switching noise on the control circuitry. Peak currents up to 750 mA can be sourced or sunk, suitable for driving either MOSFET or Bipolar transistors. This output pin must be shunted by a Schottky diode, 1N5819 or equivalent. The ground pin is a single return, typically connected back to the power source; it is used as control and power ground. The foldback function provides overload protection. Feeding the foldback input with a portion of the VCC voltage (1.0 V max) establishes on the system control loop a foldback characteristic allowing a smoother startup and sharper overload protection. Above 1.0 V the foldback input is inactive. When the overvoltage protection pin receives a voltage greater than 17 V, the device is disabled and requires a complete restart sequence. The overvoltage level is programmable. A voltage proportional to the current flowing into the power switch is connected to this input. The PWM latch uses this information to terminate the conduction of the output buffer when working in a current mode of operation. A maximum level of 1.0 V allows either current or voltage mode operation. A voltage delivered by an auxiliary transformer winding provides to the demagnetization pin an indication of the magnetization state of the flyback transformer. A zero voltage detection corresponds to complete core saturation. The demagnetization detection ensures a discontinuous mode of operation. This function can be inhibited by connecting Pin 8 to Gnd. The synchronization input pin can be activated with either a negative pulse going from a level between 0.7 V and 3.7 V to Gnd or a positive pulse going from a level between 0.7 V and 3.7 V up to a level higher than 3.7 V. The oscillator runs free when Pin 9 is connected to Gnd. The normal mode oscillator frequency is programmed by the capacitor CT choice together with the Rref resistance value. CT, connected between Pin 10 and Gnd, generates the oscillator sawtooth. A capacitor, resistor or a voltage source connected to this pin limits the switching duty­cycle. This pin can be used as a voltage mode control input. By connecting Pin 11 to Ground, the MC44603A can be shut down. A voltage level applied to the RP Standby pin determines the output power level at which the oscillator will turn into the reduced frequency mode of operation (i.e. standby mode). An internal hysteresis comparator allows to return in the normal mode at a higher output power level. The error amplifier output is made available for loop compensation. This is the inverting input of the Error Amplifier. It can be connected to the switching power supply output through an optical (or other) feedback loop. The reduced frequency or standby frequency programming is made by the RF Standby resistance choice. Rref sets the internal reference current. The internal reference current ranges from 100 µA to 500 µA. This requires that 5.0 k Rref 25 k.

6 7

Overvoltage Protection Current Sense Input Demagnetization Detection

8

9

Synchronization Input CT Soft­Start/Dmax/ Voltage­Mode RP Standby

10 11

12

13 14 15 16

E/A Out Voltage Feedback RF Standby Rref

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MC44603A
VCC Startup No-Take Over Restart Normal Mode Loop Failure >2.0 µs

VCC prot Vstup-th Vdisable1 Vdisable2

Vref

UVLO1

VPin 11 (Soft-Start)

VOVP Out

ICC 17 mA 0.3 mA

Figure 27. Starting Behavior and Overvoltage Management

VDemag In

Output (Pin 3)

VDemag Out

VDemag In

Demagnetization Management

VDemag Out

Oscillator

Buffer

Output

Figure 28. Demagnetization http://onsemi.com
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Output

MC44603A
VCC Vstup-th Vdisable1 Vdisable2

Vref

UVLO1

VPin 11 (Soft-Start)

ICC 17 mA 0.3 mA

Figure 29. Switching Off Behavior
VCT 1.0 V VStby 3.6 V 1.6 V

VDemag Out

VOSC

VOSC prot

VDemag Out

Synchronization Input

Oscillator

CT VStby

Figure 30. Oscillator http://onsemi.com
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VOSC prot VOSC

Output (Pin 3)

MC44603A
Vref

VCSS + 1.6 V VCT 3.6 V VCT low 1.6 V

Soft-Start

Internal Clamp

External Clamp

VOSC

Output (Pin 3)

Figure 31. Soft­Start & Dmax

OPERATING DESCRIPTION
Error Amplifier
+ Compensation RFB Cf Rf 13 14 2.5 V Error Amplifier 1.0 mA 2R R Current Sense Comparator

A fully compensated Error Amplifier with access to the inverting input and output is provided. It features a typical dc voltage gain of 70 dB. The noninverting input is internally biased at 2.5 V and is not pinned out. The converter output voltage is typically divided down and monitored by the inverting input. The maximum input bias current with the inverting input at 2.5 V is ­2.0 µA. This can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. The Error Amp output (Pin 13) is provided for external loop compensation. The output voltage is offset by two diode drops ( 1.4 V) and divided by three before it connects to the inverting input of the Current Sense Comparator. This guarantees that no drive pulses appear at the Output (Pin 3) when Pin 13 is at its lowest state (VOL). The Error Amp minimum feedback resistance is limited by the amplifier's minimum source current (0.2 mA) and the required output voltage (VOH) to reach the current sense comparator's 1.0 V clamp level:
Rf(min) [ 3.0 (1.0 V) ) 1.4 V + 22 kW 0.2 mA

Voltage Feedback Input 5 Foldback Input R1 R2 From Power Supply Output

1.0 V Gnd

4

Figure 32. Error Amplifier Compensation Current Sense Comparator and PWM Latch

The MC44603A can operate as a current mode controller or as a voltage mode controller. In current mode operation, the MC44603A uses the current sense comparator. The output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the Error Amplifier output

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MC44603A
(Pin 13). Thus, the error signal controls the peak inductor current on a cycle­by­cycle basis. The Current Sense Comparator PWM Latch ensures that only a single pulse appears at the Source Output during the appropriate oscillator cycle. The inductor current is converted to a voltage by inserting the ground referenced sense resistor RS in series with the power switch Q1. This voltage is monitored by the Current Sense Input (Pin 7) and compared to a level derived from the Error Amp output. The peak inductor current under normal operating conditions is controlled by the voltage at Pin 13 where:
Ipk [ V(Pin 13) ­ 1.4 V 3 RS
10 CT 3.6 V COSC Regul 0 1 Vin VC VOSC prot VDemag Out Thermal Protection S R Q R PWM Latch Current Sense Comparator UVLO 14 R2 3 D 1N5819 Current Substrate Sense 7 C R3 10 R RS CT Q1 Vref ICharge 0.4 Iref 0 1 COSC Regul 1.6 V 0: Discharge Phase 1: Charge Phase IRegul 0 IRegul 1

the discharge current source has to be higher than the charge current to be able to decrease the CT voltage (refer to Figure 35). This condition is performed, its value being (2.0 Iref) in normal working and (0.4 Iref + 0.5 IF Stby in standby mode).
Vref 0.4 Iref CVOS prot 1.0 V COSC Low 1.6 V COSC High CT < 1.6 V Discharge R Q Disch S VOSC prot VOSC R Q LOSC S

Synchro VDemag
Out

The Current Sense Comparator threshold is internally clamped to 1.0 V. Therefore, the maximum peak switch current is:
Ipk(max) [ 1.0 V RS

IDischarge

Figure 34. Oscillator

IDischarge

Figure 33. Output Totem Pole
Series gate resistor, R2, will dampen any high frequency oscillations caused by the MOSFET input capacitance and any series wiring inductance in the gate­source circuit. Diode D is required if the negative current into the output drive pin exceeds 15 mA.

Figure 35. Simplified Block Oscillator

Oscillator

The oscillator is a very accurate sawtooth generator that can work either in free mode or in synchronization mode. In this second mode, the oscillator stops in the low state and waits for a demagnetization or a synchronization pulse to start a new charging cycle.
· The Sawtooth Generation:

In the steady state, the oscillator voltage varies between about 1.6 V and 3.6 V. The sawtooth is obtained by charging and discharging an external capacitor CT (Pin 10), using two distinct current sources = Icharge and Idischarge. In fact, CT is permanently connected to the charging current source (0.4 I ref) and so,

Two comparators are used to generate the sawtooth. They compare the CT voltage to the oscillator valley (1.6 V) and peak reference (3.6 V) values. A latch (Ldisch) memorizes the oscillator state. In addition to the charge and discharge cycles, a third state can exist. This phase can be produced when, at the end of the discharge phase, the oscillator has to wait for a synchronization or demagnetization pulse before restarting. During this delay, the CT voltage must remain equal to the oscillator valley value (]1.6 V). So, a third regulated current source IRegul controlled by COSC Regul, is connected to CT in order to perfectly compensate the (0.4 Iref) current source that permanently supplies CT. The maximum duty cycle is 80%. Indeed, the on­time is allowed only during the oscillator capacitor charge.

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MC44603A
Consequently: Tcharge = CT x V/Icharge Tdischarge = CT x V/Idischarge where: Tcharge is the oscillator charge time V is the oscillator peak­to­peak value Icharge is the oscillator charge current and Tdischarge is the oscillator discharge time Idischarge is the oscillator discharge current So, as fS = 1 /(Tcharge + Tdischarge) when the Regul arrangement is not activated, the operating frequency can be obtained from the graph in Figure 1. NOTE: The output is disabled by the signal VOSC prot when VCT is lower than 1.0 V (refer to Figure 30).
Synchronization and Demagnetization Blocks

­ equal to zero for the dead­time with generally some ­ ringing (refer to Figure 37). That is why, the MC44603A demagnetization detection consists of a comparator that can compare the auxiliary winding voltage to a reference that is typically equal to 65 mV.

VPin 8

Zero Current Detection

0.75 V

65 mV

-0.33 V On-Time Off-Time Dead-Time

To enable the output, the LOSC latch complementary output must be low. Reset is activated by the Ldisch output during the discharge phase. To restart, the LOSC has to be set (refer to Figure 34). To perform this, the demagnetization signal and the synchronization must be low.
· Synchronization:

Figure 37. Demagnetization Detection

The synchronization block consists of two comparators that compare the synchronization signal (external) to 0.7 and 3.7 V (typical values). The comparators' outputs are connected to the input of an AND gate so that the final output of the block should be: ­ high when 0.7 < SYNC < 3.7 V ­ low in the other cases. As a low level is necessary to enable the output, synchronized low level pulses have to be generated on the output of the synchronization block. If synchronization is not required, the Pin 9 must be connected to the ground.
3.7 V Oscillator Output Buffer Sync 9 0.7 V

A diode D has been incorporated to clamp the positive applied voltages while an active clamping system limits the negative voltages to typically ­0.33 V. This negative clamp level is sufficient to avoid the substrate diode switching on. In addition to the comparator, a latch system has been incorporated in order to keep the demagnetization block output level low as soon as a voltage lower than 65 mV is detected and as long as a new restart is produced (high level on the output) (refer to Figure 38). This process prevents ringing on the signal at Pin 8 from disrupting the demagnetization detection. This results in a very accurate demagnetization detection. The demagnetization block output is also directly connected to the output, disabling it during the demagnetization phase (refer to Figure 33). NOTE: The demagnetization detection can be inhibited by connecting Pin 8 to the ground.
Oscillator Buffer Output R Q Demag S

Figure 36. Synchronization
VDemag Out

VCC Negative Active Clamping System

· Demagnetization:

In flyback applications, a good means to detect magnetic saturation of the transformer core, or demagnetization, consists in using the auxiliary winding voltage. This voltage is: ­ negative during the on­time, ­ positive during the off­time,

C Dem 65 mV D

8

Figure 38. Demagnetization Block

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MC44603A
Standby · Power Losses in a Classical Flyback Structure
Clamping Network + Rstartup VCC MC44603A RS Snubber

where fS is the normal working switching frequency. Also,
V Ipk + CS RS

RICL AC Line

Vin

+

where RS is the resistor used to measure the power switch current. Thus, the input power is proportional to VCS2 (VCS being the internal current sense comparator input). That is why the standby detection is performed by creating a VCS threshold. An internal current source (0.4 x Iref) sets the threshold level by connecting a resistor to Pin 12. As depicted in Figure 40, the standby comparator noninverting input voltage is typically equal to (3.0 x VCS + VF) while the inverter input value is (VR P Stby + VF).
Vref Vref 0.4 Iref 0.6 Iref 0 1 CStby Vref Vref 0.8 Iref 1 0.25 IF Stby 0 Vref Oscillator Discharge Current

Figure 39. Power Losses in a Classical Flyback Structure

In a classical flyback (as depicted in Figure 39), the standby losses mainly consist of the energy waste due to: ­ the startup resistor Rstartup ­ the consumption of the IC and the power ­ switch control ­ the inrush current limitation resistor RICL ­ the switching losses in the power switch ­ the snubber and clamping network Pstartup is nearly constant and is equal to:
(Vin­VCC)2 Rstartup

RP Stby 12 13 ERAmpOut

0.2 Iref

Pstartup Pcontrol PICL PSW PSN­CLN
2R 1R

IDischarge/2 C. S. Comparator

IDischarge

Current Mirror X2

Figure 40. Standby

PICL only depends on the current drawn from the mains. Losses can be considered constant. This waste of energy decreases when the standby losses are reduced. Pcontrol increases when the oscillator frequency is increased (each switching requires some energy to turn on the power switch). PSW and PSN­CLN are proportional to the switching frequency. Consequently, standby losses can be minimized by decreasing the switching frequency as much as possible. The MC44603A was designed to operate at a standby frequency lower than the normal working one.
· Standby Power Calculations with MC44603A

The VCS threshold level is typically equal to [(VR P Stby)/3] and if the corresponding power threshold is labelled PthL:
PthL + 0.5 x L x VR P Stby 2 x fS 3.0 RS

And as:
VR P Stby + RP Stby x 0.4 x Iref + RR P Stby x 0.4 x RP Stby + 10.6 x RS x Rref x Vref Vref Rref PthL L x fS

During a switching period, the energy drawn by the transformer during the on­time to be transferred to the output during the off­time, is equal to:
E + 1 x L x Ipk2 2

where: ­ L is the transformer primary inductor, ­ lpk is the inductor peak current. Input power is labelled Pin:
Pin + 0.5 x L x Ipk2 x fS

Thus, when the power drawn by the converter decreases, VCS decreases and when VCS becomes lower than [VCS­th x (VR P Stby)/3], the standby mode is activated. This results in an oscillator discharge current reduction in order to increase the oscillator period and to diminish the switching frequency. As it is represented in Figure 40, the (0.8 x Iref) current source is disconnected and is replaced by a lower value one (0.25 x IF Stby). Where: IF Stby = Vref/RF Stby In order to prevent undesired mode switching when power is close to the threshold value, a hysteresis that is

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MC44603A
proportional to VR P Stby is incorporated creating a second VCS threshold level that is equal to [2.5 x (VR P Stby)/3]. When the standby comparator output is high, a second current source (0.6 x Iref) is connected to Pin 12. Finally, the standby mode function can be shown graphically in Figure 41.
Pin fS

Using the internal current source (0.4 Iref), the Pin 11 voltage can easily be set by connecting a resistor to this pin. If a capacitor is connected to Pin 11, the voltage increases from 0 to its maximum value progressively (refer to Figure 44), thereby, implementing a soft­start. The soft­start capacitor is discharged internally when the VCC (Pin 1) voltage drops below 9.0 V.
Pin 11 RI R Connected to Pin 11 I = 0.4 Iref VZ C VZ RI C // R

= RC Normal Working PthH PthL [(VR P Stby)/3] Standby 2.5 x [(VR P Stby)/3] 1 VCS

fStby

Figure 44. Different Possible Uses of Pin 11

If no external component is connected to Pin 11, an internal zener diode clamps the Pin 11 voltage to a value VZ that is higher than the oscillator peak value, disabling soft­start and maximum duty cycle limitation.
Foldback

Figure 41. Dynamic Mode Change

This curve shows that there are two power threshold levels: ­ the low one:
PthL fixed by VR P Stby

­ the high one:
PthH + (2.5)2 x PthL x PthH + 6.25 x PthL x fStby fS

fStby fS

Maximum Duty Cycle and Soft­Start Control

Maximum duty cycle can be limited to values less than 80% by utilizing the Dmax and soft­start control. As depicted in Figure 42, the Pin 11 voltage is compared to the oscillator sawtooth.
Vref 0.4 Iref 11 DZ Soft-Start Capacitor 2.4 V CDmax VOSC Dmax Output Drive Output Control

As depicted in Figures 32 and 48, the foldback input (Pin 5) can be used to reduce the maximum VCS value, providing foldback protection. The foldback arrangement is a programmable peak current limitation. If the output load is increased, the required converter peak current becomes higher and VCS increases until it reaches its maximum value (normally, VCS max = 1.0 V). Then, if the output load keeps on increasing, the system is unable to supply enough energy to maintain the output voltages in regulation. Consequently, the decreasing output can be applied to Pin 5, in order to limit the maximum peak current. In this way, the well known foldback characteristic can be obtained (refer to Figure 45).
Vout VO Nominal New Startup Sequence Initiated VCC Vdisable2 Ipk max

Iout Overload

Oscillator

Figure 42. Dmax and Soft­Start
Voltage Dmax Pin 11 VCT (Pin 10)

Figure 45. Foldback Characteristic

NOTE: Foldback is disabled by connecting Pin 5 to VCC.
Overvoltage Protection

Figure 43. Maximum Duty Cycle Control

The overvoltage arrangement consists of a comparator that compares the Pin 6 voltage to Vref (2.5 V) (refer to Figure 46).

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MC44603A
If no external component is connected to Pin 6, the comparator noninverting input voltage is nearly equal to:
2.0 kW 11.6 kW ) 2.0 kW The comparator output is high when: 2.0 kW 11.6 kW ) 2.0 kW x VCC w 2.5 V
VCC 1 1 Vdisable2 7.5 V CUVLO1 Vdisable1 9.0 V 0 Startup 14.5 V UVLO1 (to Soft-Start)

Undervoltage Lockout Section

x VCC
Vref enable Cstartup 1

RF Stby Pin 15

Rref Pin 16

à VCC w 17 V

A delay latch (2.0 µs) is incorporated in order to sense overvoltages that last at least 2.0 µs. If this condition is achieved, VOVP out, the delay latch output, becomes high. As this level is brought back to the input through an OR gate, VOVP out remains high (disabling the IC output) until Vref is disabled. Consequently, when an overvoltage longer than 2.0 µs is detected, the output is disabled until VCC is removed and then re­applied. The VCC is connected after Vref has reached steady state in order to limit the circuit startup consumption. The overvoltage section is enabled 5.0 µs after the regulator has started to allow the reference Vref to stabilize. By connecting an external resistor to Pin 6, the threshold VCC level can be changed.
VCC Vref Out T 0 VOVP External Resistor 6 2.5 V Delay In

0

Reference Block: Voltage and Current Sources Generator (Vref, Iref, ...)

Figure 47. VCC Management

As depicted in Figure 47, an undervoltage lockout has been incorporated to garantee that the IC is fully functional before allowing system operation. This block particularly, produces Vref (Pin 16 voltage) and Iref that is determined by the resistor Rref connected between Pin 16 and the ground:
V Iref + ref where Vref + 2.5 V (typically) Rref



5.0 µs

11.6 k Enable 2.0 k COVLO 2.5 V (Vref) In Out Delay 2.0 µs



VOVP out

(If VOVP out = 1.0, the Output is Disabled)

Figure 46. Overvoltage Protection

Another resistor is connected to the Reference Block: RF Stby that is used to fix the standby frequency. In addition to this, VCC is compared to a second threshold level that is nearly equal to 9.0 V (Vdisable1). UVLO1 is generated to reset the maximum duty cycle and soft­start block disabling the output stage as soon as VCC becomes lower than Vdisable1. In this way, the circuit is reset and made ready for the next startup, before the reference block is disabled (refer to Figure 29). Finally, the upper limit for the minimum normal operating voltage is 9.4 V (maximum value of Vdisable1) and so the minimum hysteresis is 4.2 V. ((Vstup­th) min = 13.6 V). The large hysteresis and the low startup current of the MC44603A make it ideally suited for off­line converter applications where efficient bootstrap startup techniques are required.

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MC44603A
185 Vac to 270 Vac RFI Filter

R1 1.0/5.0 W C4 ... C7 1.0 nF/1000 V

C3 1.0 nF/1.0 kV

D1 ... D4 1N4007

R3 4.7 M C1 220 µF R20 22 k 5.0 W D5 1N4934 C2 220 µF C16 100 pF R12 27 k R9 1.0 k C15 1.0 nF R7 180 k R8 15 k *D15 1N5819 R10 10 R11 39 R12 22 C13 100 nF R14 0.2 R13 1.0 k D11 MR852 C21 1000 µF R24 270 MOC8101 R21 10 k C19 100 nF R6 150 MTP6N60E R26 1.0 k C18 2.2 nF D12 MR856 C17 47 nF

C32 220 pF

L2 22.5 µH

150 V/0.6 A C31 0.1 µF

R2 68 k/2.0 W Sync C8 2.2 nF C9 1.0 nF C10 1.0 µF

D8 MR856 C30 100 µF C29 220 pF

C33 100 µF

L1 1.0 µH D6 1N4148 C14 4.7 nF

D7 M856

30 V/2.0 A D9 MR852 C27 1000 µF C28 0.1 µF

9 10 11 MC44603AP 12

8 7 6 5 4 3 2 1

R5 1.2 k

Laux

Lp

C26 220 pF 14 V/2.0 A D10 MR852 C25 1000 µF C24 0.1 µF

R15 5.6 k R15 22 k C11 1.0 nF

13 14 15 16

C23 220 pF 7.0 V/2.0 A C22 0.1 µF

R17 22 k

R18 27 k

R19 10 k

R23 147.5 k D14 1N4733

R25 1.0 k

C12 6.8 nF

TL431

C20 33 nF R22 2.5 k

* Diode D15 is required if the negative current into the output pin exceeds 15 mA.

Figure 48. 250 W Input Power Off­Line Flyback Converter with MOSFET Switch

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MC44603A
250 W Input Power Fly­Back Converter 185 V ­ 270 V Mains Range MC44603AP & MTP6N60E
Tests Line Regulation 150 V 130 V 114 V 7.0 V Load Regulation 150 V Cross Regulation Conditions Vin = 185 Vac to 270 Vac Fmains = 50 Hz Iout = 0.6 A Iout = 2.0 A Iout = 2.0 A Iout = 2.0 A Vin = 220 Vac Iout = 0.3 A to 0.6 A Vin = 220 Vac Iout (150 V) = 0.6 A Iout (30 V) = 0 A to 2.0 A Iout (14 V) = 2.0 A Iout (7.0 V) = 2.0 A < 1.0 mV Vin = 220 Vac, Pin = 250 W Vin = 220 Vac, Pout = 0 W 81% 3.3 W 20 kHz fully stable Pout (max) = 270 W Pin = 250 W Safe on all outputs Vac = 160 V Results

10 mV 10 mV 10 mV 20 mV 50 mV

150 V Efficiency Standby Mode P input Switching Frequency Output Short Circuit Startup

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MC44603A
PACKAGE DIMENSIONS

P SUFFIX PLASTIC PACKAGE CASE 648­08 ISSUE R

­A­
16 9

B
1 8

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01

F S

C

L

­T­ H G D
16 PL

SEATING PLANE

K

J T A
M

M

0.25 (0.010)

M

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MC44603A
PACKAGE DIMENSIONS

DW SUFFIX PLASTIC PACKAGE CASE 751G­03 ISSUE B

D
16 M 9

A

q
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 10.15 10.45 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_

H

B

1 16X

8

B T A
S

B B
S

0.25

M

A

h X 45 _
SEATING PLANE

M

8X

0.25

E

A1

14X

e

T

C

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L

MC44603A

Notes

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MC44603A

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MC44603A/D