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Multistandard
Sound Processor Family
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PRELIMINARY DATA SHEET
MICRONAS
MSP 34x5G Multistandard Sound Processor Family
Edition March 5, 2001 6251-480-3PD
MICRONAS
MSP 34x5G
Contents Page 5 6 6 7 8 9 9 9 9 10 10 10 12 12 12 12 12 12 13 13 13 13 14 14 14 15 15 15 16 16 17 17 17 17 17 17 17 17 20 21 21 21 23 25 26 Section 1. 1.1. 1.2. 1.3. 2. 2.1. 2.2. 2.2.1. 2.2.2. 2.2.3. 2.2.4. 2.2.5. 2.3. 2.4. 2.5. 2.5.1. 2.5.2. 2.5.3. 2.6. 2.6.1. 2.6.2. 2.7. 2.8. 2.9. 2.10. 3. 3.1. 3.1.1. 3.1.2. 3.1.3. 3.1.4. 3.1.4.1. 3.1.4.2. 3.1.4.3. 3.1.4.4. 3.2. 3.3. 3.3.1. 3.3.2. 3.3.2.1. 3.3.2.2. 3.3.2.3. 3.3.2.4. 3.3.2.5. 3.3.2.6. Title
PRELIMINARY DATA SHEET
Introduction Features of the MSP 34x5G Family and Differences to MSPD MSP 34x5G Version List MSP 34x5G Versions and their Application Fields Functional Description Architecture of the MSP 34x5G Family Sound IF Processing Analog Sound IF Input Demodulator: Standards and Features Preprocessing of Demodulator Signals Automatic Sound Select Manual Mode Preprocessing for SCART and I2S Input Signals Source Selection and Output Channel Matrix Audio Baseband Processing Automatic Volume Correction (AVC) Loudspeaker Outputs Quasi-Peak Detector SCART Signal Routing SCART DSP In and SCART Out Select Stand-by Mode I2S Bus Interface ADR Bus Interface Digital Control I/O Pins and Status Change Indication Clock PLL Oscillator and Crystal Specifications Control Interface I2C Bus Interface Internal Hardware Error Handling Description of CONTROL Register Protocol Description Proposals for General MSP 34x5G I2C Telegrams Symbols Write Telegrams Read Telegrams Examples Start-Up Sequence: Power-Up and I2C-Controlling MSP 34x5G Programming Interface User Registers Overview Description of User Registers STANDARD SELECT Register Refresh of STANDARD SELECT Register STANDARD RESULT Register Write Registers on I2C Subaddress 10hex Read Registers on I2C Subaddress 11hex Write Registers on I2C Subaddress 12hex
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PRELIMINARY DATA SHEET
MSP 34x5G
Contents, continued Page 36 37 37 37 37 37 38 38 38 40 40 42 45 47 51 53 53 54 54 54 55 56 58 58 59 60 61 62 64 65 65 66 69 73 73 74 75 75 76 76 77 77 78 79 79 Section 3.3.2.7. 3.4. 3.5. 3.5.1. 3.5.2. 3.5.3. 3.5.4. 3.5.5. 3.5.6. 4. 4.1. 4.2. 4.3. 4.4. 4.5. 4.6. 4.6.1. 4.6.2. 4.6.2.1. 4.6.2.2. 4.6.2.3. 4.6.2.4. 4.6.3. 4.6.3.1. 4.6.3.2. 4.6.3.3. 4.6.3.4. 4.6.3.5. 4.6.3.6. 4.6.3.7. 4.6.3.8. 4.6.3.9. 4.6.3.10. 5. 5.1. 5.2. 5.3. 5.4. 5.5. 5.6. 6. 6.1. 6.2. 6.3. 6.3.1. Title Read Registers on I2C Subaddress 13hex Programming Tips Examples of Minimum Initialization Codes B/G-FM (A2 or NICAM) BTSC-Stereo BTSC-SAP with SAP at Loudspeaker Channel FM-Stereo Radio Automatic Standard Detection Software Flow for Interrupt driven STATUS Check Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Description Pin Configurations Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions General Recommended Operating Conditions Analog Input and Output Recommendations Recommendations for Analog Sound IF Input Signal Crystal Recommendations Characteristics General Characteristics Digital Inputs, Digital Outputs Reset Input and Power-Up I2C Bus Characteristics I2S-Bus Characteristics Analog Baseband Inputs and Outputs, AGNDC Sound IF Input Power Supply Rejection Analog Performance Sound Standard Dependent Characteristics Appendix A: Overview of TV Sound Standards NICAM 728 A2 Systems BTSC-Sound System Japanese FM Stereo System (EIA-J) FM Satellite Sound FM-Stereo Radio Appendix B: Manual/Compatibility Mode Demodulator Write and Read Registers for Manual/Compatibility Mode DSP Write and Read Registers for Manual/Compatibility Mode Manual/Compatibility Mode: Description of Demodulator Write Registers Automatic Switching between NICAM and Analog Sound
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MSP 34x5G
Contents, continued Page 79 79 81 81 82 83 85 85 87 87 87 87 88 88 88 88 89 89 89 89 89 89 90 90 90 90 90 91 91 91 91 91 93 93 94 96 96 Section 6.3.1.1. 6.3.1.2. 6.3.2. 6.3.3. 6.3.4. 6.3.5. 6.3.6. 6.3.7. 6.4. 6.4.1. 6.4.2. 6.4.3. 6.4.4. 6.4.5. 6.4.6. 6.4.7. 6.5. 6.5.1. 6.5.2. 6.5.3. 6.5.4. 6.5.5. 6.5.6. 6.5.7. 6.6. 6.6.1. 6.6.2. 6.7. 6.7.1. 6.7.2. 6.8. 6.9. 7. 7.1. 7.2. 8. 9. Title
PRELIMINARY DATA SHEET
Function in Automatic Sound Select Mode Function in Manual Mode A2 Threshold Carrier-Mute Threshold Register AD_CV Register MODE_REG FIR-Parameter, Registers FIR1 and FIR2 DCO-Registers Manual/Compatibility Mode: Description of Demodulator Read Registers NICAM Mode Control/Additional Data Bits Register Additional Data Bits Register CIB Bits Register NICAM Error Rate Register PLL_CAPS Readback Register AGC_GAIN Readback Register Automatic Search Function for FM-Carrier Detection in Satellite Mode Manual/Compatibility Mode: Description of DSP Write Registers Additional Channel Matrix Modes Volume Modes of SCART1 Output FM Fixed Deemphasis FM Adaptive Deemphasis NICAM Deemphasis Identification Mode for A2 Stereo Systems FM DC Notch Manual/Compatibility Mode: Description of DSP Read Registers Stereo Detection Register for A2 Stereo Systems DC Level Register Demodulator Source Channels in Manual Mode Terrestric Sound Standards SAT Sound Standards Exclusions of Audio Baseband Features Compatibility Restrictions to MSP 34x5D Appendix D: Application Information Phase Relationship of Analog Outputs Application Circuit Appendix E: MSP 34x5G Version History Data Sheet History
License Notice: "Dolby Pro Logic" is a trademark of Dolby Laboratories. Supply of this implementation of Dolby Technology does not convey a license nor imply a right under any patent, or any other industrial or intellectual property right of Dolby Laboratories, to use this implementation in any finished end-user or ready-to-use final product. Companies planning to use this implementation in products must obtain a license from Dolby Laboratories Licensing Corporation before designing such products.
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PRELIMINARY DATA SHEET
MSP 34x5G
EIA-J. The MSP 34x5G has optimum stereo performance without any adjustments. All MSP 34xxG versions are pin compatible to the MSP 34xxD. Only minor modifications are necessary to adapt a MSP 34xxD controlling software to the MSP 34xxG. The MSP 34x5G further simplifies controlling software. Standard selection requires a single I2C transmission only. Note: The MSP 34x5G version has reduced control registers and less functional pins. The remaining registers are software-compatible to the MSP 34x0G. The pinning is compatible to the MSP 34x0G. The MSP 34x5G has built-in automatic functions: The IC is able to detect the actual sound standard automatically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/ stereo/bilingual; no I2C interaction is necessary (Automatic Sound Selection). The MSP 34x5G can handle very high FM deviations even in conjunction with NICAM processing. This is especially important for the introduction of NICAM in China. The ICs are produced in submicron CMOS technology. The MSP 34x5G is available in the following packages: PSDIP64, PSDIP52, PMQFP44, PLQFP64, and PQFP80.
Multistandard Sound Processor Family Release Note: Revision bars indicate significant changes to the previous edition. The hardware and software description in this document is valid for the MSP 34x5G version B8 and following versions.
1. Introduction The MSP 34x5G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed in a single chip. Figure 11 shows a simplified functional block diagram of the MSP 34x5G. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM-Stereo-Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and
Sound IF1
ADC
Demodulator
Preprocessing
Loudspeaker Sound Processing
DAC
Loudspeaker
I2S1 I2S2 Prescale
Source Select
I2S
SCART1 DAC SCART DSP Input Select
SCART2
ADC
Prescale
SCART Output Select
SCART1
MONO
Fig. 11: Simplified functional block diagram of MSP 34x5G
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1.1. Features of the MSP 34x5G Family and Differences to MSPD
Feature (New features not available for MSPD are shaded gray.) 3405 X X X X X X X X X X X X X 3415 X X X X X X X X X X X X X X X X X X X
PRELIMINARY DATA SHEET
3425 X X X X X X X X X X X X
3445 X X X X X X X X X X X X
3455 X X X X X X X X X X X X X X X X X
3465 X X X X X X X X X X X X
Standard Selection with single I2C transmission Automatic Standard Detection of terrestrial TV standards Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS Automatic Carrier Mute function Interrupt output programmable (indicating status change) Loudspeaker channel with volume, balance, bass, treble, loudness AVC: Automatic Volume Correction Spatial effect for loudspeaker channel Two Stereo SCART (line) inputs, one Mono input; one Stereo SCART outputs Complete SCART in/out switching matrix Two I2S inputs; one I2S output All analog Mono sound carriers including AM-SECAM L All analog FM-Stereo A2 and satellite standards All NICAM standards Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification) ASTRA Digital Radio (ADR) together with DRP 3510A Demodulation of the BTSC multiplex signal and the SAP channel Alignment free digital DBX noise reduction for BTSC Stereo and SAP Alignment free digital Micronas Noise Reduction (MNR) for BTSC Stereo and SAP BTSC stereo separation (MSP 3425/45G also EIA-J) significantly better than spec. SAP and stereo detection for BTSC system Korean FM-Stereo A2 standard Alignment-free Japanese standard EIA-J Demodulation of the FM-Radio multiplex signal
X
X
X X
X X
X X X X X X X X X X X X X X X X X X
1.2. MSP 34x5G Version List
Version MSP 3405G MSP 3415G MSP 3425G MSP 3445G MSP 3455G MSP 3465G Status available available available available available available Description FM Stereo (A2) Version NICAM and FM Stereo (A2) Version NTSC Version (A2 Korea, BTSC with Micronas Noise Reduction (MNR), Japanese EIA-J system) NTSC Version (A2 Korea, BTSC with DBX noise reduction, Japanese EIA-J system) Global Stereo Version (all sound standards) Global Mono Version (all sound standards)
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PRELIMINARY DATA SHEET
MSP 34x5G
1.3. MSP 34x5G Versions and their Application Fields Table 11 provides an overview of TV sound standards that can be processed by the MSP 34x5G family. In addition, the MSP 34x5G is able to handle the FMRadio standard. With the MSP 34x5G, a complete multimedia receiver covering all TV sound standards together with terrestrial/cable and satellite radio sound can be built; even ASTRA Digital Radio can be processed (with a DRP 3510A coprocessor).
Table 11: TV Stereo Sound Standards covered by the MSP 34x5G IC Family (details see Appendix A)
MSP Version 3405 TVSystem B/G 5.5/5.85 L I 6.5/5.85 6.0/6.552 6.5/6.2578125 3405 3415 6.5/6.7421875 D/K 6.5/5.7421875 3455 6.5/5.85 6.5 7.02/7.2 7.38/7.56 etc. 4.5/4.724212 3425, 3445 M/N 4.5 4.5 FM-Radio 3465 10.7 FM-Stereo (A2, D/K3) FM-Mono/NICAM (D/K, NICAM) FM-Mono FM-Stereo ASTRA Digital Radio (ADR) with DRP 3510A FM-Stereo (A2) FM-FM (EIA-J) BTSC-Stereo + SAP FM-Stereo Radio SECAM-East PAL Poland China, Hungary FM-Mono/NICAM AM-Mono/NICAM FM-Mono/NICAM FM-Stereo (A2, D/K1) FM-Stereo (A2, D/K2) PAL SECAM-L PAL SECAM-East PAL Scandinavia, Spain France UK, Hong Kong Slovak. Rep. currently no broadcast Position of Sound Carrier /MHz 5.5/5.7421875 Sound Modulation FM-Stereo (A2) Color System PAL Broadcast e.g. in: Germany
3405
Satellite
PAL
Europe Sat. ASTRA
NTSC NTSC NTSC, PAL
Korea Japan USA, Argentina USA, Europe
All standards as above, but Mono demodulation only.
33
34 39 MHz
4.5 9 MHz
SAW Filter Tuner Sound IF Mixer
1
Loudspeaker
Mono Vision Demodulator SCART Inputs Composite Video
MSP 34x5G
2 2
SCART1
2
SCART1
SCART Output
SCART2
I2S1 Dolby Pro Logic Processor DPL 351xA
ADR
I2S2
ADR Decoder DRP 3510A
Fig. 12: Typical MSP 34x5G application
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I2S_DA_IN1
I2S Interface
I2S1 5 Prescale
(16hex)
Source Select
SCART DSP Input Select
SC1_IN_L SC1_IN_R SC2_IN_L SC2_IN_R MONO_IN
SCART Output Select
8
Standard Selection AGC ANA_IN1+ D A DEMODULATOR (incl. Carrier Mute) Deemphasis: 50/75 µs, J17 DBX/MNR Panda1 FM/AM Prescale
(0Ehex)
2. Functional Description
MSP 34x5G
Automatic Sound Select
FM/AM
0 1 3
Stereo or A/B
Loudspeaker Channel Matrix
(08hex)
AVC
Bass/ Treble
(02hex) (03hex)
Loudness
(04hex)
Spatial Effects
(05hex)
Volume Balance
D A
DACM_L
DACM_R
(29hex)
(01hex)
(00hex)
ADR-Bus Interface
Decoded Standards: - NICAM - A2 - AM - BTSC - EIA-J - SAT - FM-Radio
NICAM Deemphasis J17 Prescale
(10hex)
Stereo or A
Beeper
Stereo or B
4
(14hex)
Standard and Sound Detection
I2C Read Register
I2S Channel Matrix
(0Bhex)
I2 S Interface
I2S_DA_OUT
I2S_DA_IN2
I2S Interface
I2S2 6 Prescale
(12hex)
Quasi-Peak Channel Matrix
(0Chex)
Quasi-Peak Detector
I2 C Read Register
(19hex) (1Ahex)
A D
SCART 2 Prescale
(0Dhex)
SCART1 Channel Matrix
(0Ahex)
Volume
D SCART1_L/R A
(07hex)
SC1_OUT_L
SC1_OUT_R
(13hex)
PRELIMINARY DATA SHEET
(13hex)
Fig. 21: Signal flow block diagram of the MSP 34x5G (input and output names correspond to pin names). Micronas
PRELIMINARY DATA SHEET
MSP 34x5G
BTSC-Mono + SAP: Detection and FM demodulation of the aural carrier resulting in the MTS/MPX signal. Detection and evaluation of the pilot carrier, detection and FM demodulation of the SAP-subcarrier. Processing of the DBX noise reduction or Micronas Noise Reduction (MNR). Japan Stereo: Detection and FM demodulation of the aural carrier resulting in the MPX signal. Demodulation and evaluation of the identification signal and FM demodulation of the (L-R)-carrier. FM-Satellite Sound: Demodulation of one or two FM carriers. Processing of high-deviation mono or narrow bandwidth mono, stereo, or bilingual satellite sound according to the ASTRA specification. FM-Stereo-Radio: Detection and FM demodulation of the aural carrier resulting in the MPX signal. Detection and evaluation of the pilot carrier and AM demodulation of the (L-R)-carrier. The demodulator blocks of all MSP 34x5G versions have identical user interfaces. Even completely different systems like the BTSC and NICAM systems are controlled the same way. Standards are selected by means of MSP Standard Codes. Automatic processes handle standard detection and identification without controller interaction. The key features of the MSP 34x5G demodulator blocks are Standard Selection: The controlling of the demodulator is minimized: All parameters, such as tuning frequencies or filter bandwidth, are adjusted automatically by transmitting one single value to the STANDARD SELECT register. For all standards, specific MSP standard codes are defined. Automatic Standard Detection: If the TV sound standard is unknown, the MSP 34x5G can automatically detect the actual standard, switch to that standard, and respond the actual MSP standard code. Automatic Carrier Mute: To prevent noise effects or FM identification problems in the absence of an FM carrier, the MSP 34x5G offers a configurable carrier mute feature, which is activated automatically if the TV sound standard is selected by means of the STANDARD SELECT register. If no FM carrier is detected at one of the two MSP demodulator channels, the corresponding demodulator output is muted. This is indicated in the STATUS register.
2.1. Architecture of the MSP 34x5G Family Fig. 21 on page 8 shows a simplified block diagram of the IC. The block diagram contains all features of the MSP 3455G. Other members of the MSP 34x5G family do not have the complete set of features: The demodulator handles only a subset of the standards presented in the demodulator block; NICAM processing is only possible in the MSP 3415G and MSP 3455G (see dashed block in Fig. 21).
2.2. Sound IF Processing 2.2.1. Analog Sound IF Input The input pins ANA_IN1+ and ANA_IN- offer the possibility to connect sound IF (SIF) sources to the MSP 34x5G. The analog-to-digital conversion of the sound IF signal is done by an A/D-converter. An analog automatic gain circuit (AGC) allows a wide range of input levels. The high-pass filter formed by the coupling capacitor at pin ANA_IN1+ (see Section 7. "Appendix D: Application Information" on page 93) is sufficient in most cases to suppress video components. Some combinations of SAW filters and sound IF mixer ICs, however, show large picture components on their outputs. In this case, further filtering is recommended.
2.2.2. Demodulator: Standards and Features The MSP 34x5G is able to demodulate all TV sound standards worldwide including the digital NICAM system. Depending on the MSP 34x5G version, the following demodulation modes can be performed: A2-Systems: Detection and demodulation of two separate FM carriers (FM1 and FM2), demodulation and evaluation of the identification signal of carrier FM2. NICAM-Systems: Demodulation and decoding of the NICAM carrier, detection and demodulation of the analog (FM or AM) carrier. For D/K-NICAM, the FM carrier may have a maximum deviation of 384 kHz. Very high deviation FM-Mono: Detection and robust demodulation of one FM carrier with a maximum deviation of 540 kHz. BTSC-Stereo: Detection and FM demodulation of the aural carrier resulting in the MTS/MPX signal. Detection and evaluation of the pilot carrier, AM demodulation of the (L-R)-carrier and detection of the SAP subcarrier. Processing of the DBX noise reduction or Micronas Noise Reduction (MNR).
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2.2.3. Preprocessing of Demodulator Signals The NICAM signals must be processed by a deemphasis filter and adjusted in level. The analog demodulated signals must be processed by a deemphasis filter, adjusted in level, and dematrixed. The correct deemphasis filters are already selected by setting the standard in the STANDARD SELECT register. The level adjustment has to be done by means of the FM/ AM and NICAM prescale registers. The necessary dematrix function depends on the selected sound standard and the actual broadcasted sound mode (mono, stereo, or bilingual). It can be manually set by the FM Matrix Mode register or automatically by the Automatic Sound Selection.
PRELIMINARY DATA SHEET
"Stereo or A" channel: Analog or digital mono sound, stereo if available. In case of bilingual broadcast, it contains language A (on left and right). "Stereo or B" channel: Analog or digital mono sound, stereo if available. In case of bilingual broadcast, it contains language B (on left and right). Fig. 22 and Table 22 show the source channel assignment of the demodulated signals in case of Automatic Sound Select mode for all sound standards. Note: The analog primary input channel contains the signal of the mono FM/AM carrier or the L+R signal of the MPX carrier. The secondary input channel contains the signal of the 2nd FM carrier, the L-R signal of the MPX carrier, or the SAP signal.
2.2.4. Automatic Sound Select In the Automatic Sound Select mode, the dematrix function is automatically selected based on the identification information in the STATUS register. No I2C interaction is necessary when the broadcasted sound mode changes (e.g. from mono to stereo). The demodulator supports the identification check by switching between mono-compatible standards (standards that have the same FM-Mono carrier) automatically and non-audible. If B/G-FM or B/G-NICAM is selected, the MSP will switch between these standards. The same action is performed for the standards: D/K1-FM, D/K2-FM, D/K3-FM and D/K-NICAM. Switching is only done in the absence of any stereo or bilingual identification. If identification is found, the MSP keeps the detected standard. In case of high bit-error rates, the MSP 34x5G automatically falls back from digital NICAM sound to analog FM or AM mono. Table 21 summarizes all actions that take place when Automatic Sound Select is switched on.
primary channel primary channel secondary channel
FM/AM Prescale
FM/AM
0
LS Ch. Matrix Source Select
NICAM A
NICAM
Automatic Sound Select
Stereo or A/B
1
Stereo or A
3
Output-Ch. matrices must be set once to stereo.
NICAM B
Prescale
Stereo or B
4
Fig. 22: Source channel assignment of demodulated signals in Automatic Sound Select Mode
2.2.5. Manual Mode Fig. 23 shows the source channel assignment of demodulated signals in case of manual mode. If manual mode is required, more information can be found in Section 6.7. "Demodulator Source Channels in Manual Mode" on page 91.
FM/AM FM-Matrix
FM/AM 0
LS Ch. Matrix Source Select
To provide more flexibility, the Automatic Sound Select block prepares four different source channels of demodulated sound (Fig. 22). By choosing one of the four demodulator channels, the preferred sound mode can be selected for each of the output channels (loudspeaker, headphone, etc.). This is done by means of the Source Select registers. The following source channels of demodulated sound are defined: "FM/AM" channel: Analog mono sound, stereo if available. In case of NICAM, analog mono only (FM or AM mono). "Stereo or A/B" channel: Analog or digital mono sound, stereo if available. In case of bilingual broadcast, it contains both languages A (left) and B (right).
secondary channel
Prescale
NICAM A
NICAM
NICAM (Stereo or A/B) 1
Output-Ch. matrices must be set according to the standard.
NICAM B
Prescale
Fig. 23: Source channel assignment of demodulated signals in Manual Mode
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MSP 34x5G
Table 21: Performed actions of the Automatic Sound Selection
Selected TV Sound Standard B/G-FM, D/K-FM, M-Korea, and M-Japan B/G-NICAM, L-NICAM, I-NICAM, D/K-NICAM Performed Actions Evaluation of the identification signal and automatic switching to mono, stereo, or bilingual. Preparing four demodulator source channels according to Table 22. Evaluation of NICAM-C-bits and automatic switching to mono, stereo, or bilingual. Preparing four demodulator source channels according to Table 22. In case of bad or no NICAM reception, the MSP switches automatically to FM/AM mono and switches back to NICAM if possible. A hysteresis prevents periodical switching. B/G-FM, B/G-NICAM or D/K1-FM, D/K2-FM, D/K3-FM, and D/K-NICAM Automatic searching for stereo/bilingual-identification in case of mono transmission. Automatic and nonaudible changes between Dual-FM and FM-NICAM standards while listening to the basic FM-mono sound carrier. Example: If starting with B/G-FM-Stereo, there will be a periodical alternation to B/G-NICAM in the absence of FM-Stereo/Bilingual or NICAM-identification. Once an identification is detected, the MSP keeps the corresponding standard. Evaluation of the pilot signal and automatic switching to mono or stereo. Preparing four demodulator source channels according to Table 22. Detection of the SAP carrier. In the absence of SAP, the MSP switches to BTSC-stereo if available. If SAP is detected, the MSP switches automatically to SAP (see Table 22).
BTSC-STEREO, FM Radio M-BTSC-SAP
Table 22: Sound modes for the demodulator source channels with Automatic Sound Select
Source Channels in Automatic Sound Select Mode Broadcasted Sound Standard M-Korea B/G-FM D/K-FM M-Japan Selected MSP Standard Code3) 02 03, 081) 04, 05, 07, 0B1) 30 Broadcasted Sound Mode MONO STEREO BILINGUAL: Languages A and B B/G-NICAM L-NICAM I-NICAM D/K-NICAM D/K-NICAM
(with high deviation FM)
FM/AM
(source select: 0)
Stereo or A/B
(source select: 1)
Stereo or A
(source select: 3)
Stereo or B
(source select: 4)
Mono Stereo Right = B analog Mono analog Mono analog Mono analog Mono Mono Stereo Mono Stereo Left = Mono Right = SAP Left = Mono Right = SAP Mono Stereo
Mono Stereo Left = A Right = B analog Mono NICAM Mono NICAM Stereo Left = NICAM A Right = NICAM B Mono Stereo Mono Stereo Left = Mono Right = SAP Left = Mono Right = SAP Mono Stereo
Mono Stereo A analog Mono NICAM Mono NICAM Stereo NICAM A Mono Stereo Mono Stereo Mono Mono Mono Stereo
Mono Stereo B analog Mono NICAM Mono NICAM Stereo NICAM B Mono Stereo Mono Stereo SAP SAP Mono Stereo
08, 032) 09 0A 0B, 042), 052) 0C, 0D
NICAM not available or error rate too high MONO STEREO BILINGUAL: Languages A and B
20, 21
MONO STEREO
20 BTSC 21
MONO + SAP STEREO + SAP MONO + SAP STEREO + SAP
FM Radio
40
MONO STEREO
1) 2) 3)
The Automatic Sound Select process will automatically switch to the mono compatible analog standard. The Automatic Sound Select process will automatically switch to the mono compatible digital standard. The MSP Standard Codes are defined in Table 37 on page 20.
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MSP 34x5G
2.3. Preprocessing for SCART and I2S Input Signals The SCART and I2S inputs need only be adjusted in level by means of the SCART and I2S prescale registers.
PRELIMINARY DATA SHEET
2.5. Audio Baseband Processing 2.5.1. Automatic Volume Correction (AVC) Different sound sources (e.g. terrestrial channels, SAT channels, or SCART) fairly often do not have the same volume level. Advertisements during movies usually have a higher volume level than the movie itself. This results in annoying volume changes. The AVC solves this problem by equalizing the volume level. To prevent clipping, the AVC's gain decreases quickly in dynamic boost conditions. To suppress oscillation effects, the gain increases rather slowly for low level inputs. The decay time is programmable by means of the AVC register (see page 30). For input signals ranging from -24 dBr to 0 dBr, the AVC maintains a fixed output level of -18 dBr. Fig. 24 shows the AVC output level versus its input level. For prescale and volume registers set to 0 dB, a level of 0 dBr corresponds to full scale input/output. This is SCART input/output 0 dBr = 2.0 Vrms Loudspeaker output 0 dBr = 1.4 Vrms output level [dBr]
-18 -24 -30 -24 -18 -12 -6
2.4. Source Selection and Output Channel Matrix The Source Selector makes it possible to distribute all source signals (one of the demodulator source channels or SCART) to the desired output channels (loudspeaker, etc.). All input and output signals can be processed simultaneously. Each source channel is identified by a unique source address. For each output channel, the sound mode can be set to sound A, sound B, stereo, or mono by means of the output channel matrix. If Automatic Sound Select is on, the output channel matrix can stay fixed to stereo (transparent) for demodulated signals.
0
input level [dBr]
Fig. 24: Simplified AVC characteristics
2.5.2. Loudspeaker Outputs The following baseband features are implemented in the loudspeaker output channels: bass/treble, loudness, balance, and volume. A square wave beeper can be added to the loudspeaker channel.
2.5.3. Quasi-Peak Detector The quasi-peak readout register can be used to read out the quasi-peak level of any input source. The feature is based on following filter time constants: attack time: 1.3 ms decay time: 37 ms
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PRELIMINARY DATA SHEET
MSP 34x5G
2.7. I2S Bus Interface The MSP 34x5G has a synchronous master/slave input/output interface running on 32 kHz. The interface accepts two formats: 1. I2S_WS changes at the word boundary 2. I2S_WS changes one I2S-clock period before the word boundaries. All I2S options are set by means of the MODUS and the I2S_CONFIG registers. The I2S bus interface consists of five pins: I2S_DA_IN1, I2S_DA_IN2: I2S serial data input: 16, 18....32 bits per sample I2S_DA_OUT: I2S serial data output: 16, 18...32 bits per sample I2S_CL: I2S serial clock I2S_WS: I2S word strobe signal defines the left and right sample If the MSP 34x5G serves as the master on the I2S interface, the clock and word strobe lines are driven by the IC. In this mode, only 16 or 32 bits per sample can be selected. In slave mode, these lines are input to the IC and the MSP clock is synchronized to 576 times the I2S_WS rate (32 kHz). NICAM operation is not possible in slave mode. An I2S timing diagram is shown in Fig. 428 on page 63.
2.6. SCART Signal Routing 2.6.1. SCART DSP In and SCART Out Select The SCART DSP Input Select and SCART Output Select blocks include full matrix switching facilities. To design a TV set with two pairs of SCART-inputs and one pair of SCART-outputs, no external switching hardware is required. The switches are controlled by the ACB user register (see page 34).
2.6.2. Stand-by Mode If the MSP 34x5G is switched off by first pulling STANDBYQ low and then (after >1 µs delay) switching off DVSUP and AVSUP, but keeping AHVSUP (`Stand-by'-mode), the SCART switches maintain their position and function. This allows the copying from selected SCART-inputs to SCART-outputs in the TV set's stand-by mode. In case of power on or starting from stand-by (switching on the DVSUP and AVSUP, RESETQ going high 2 ms later), all internal registers except the ACB register (page 34) are reset to the default configuration (see Table 35 on page 18). The reset position of the ACB register becomes active after the first I2C transmission into the Baseband Processing part. By transmitting the ACB register first, the reset state can be redefined.
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2.8. ADR Bus Interface For the ASTRA Digital Radio System (ADR), the MSP 3405G, MSP 3415G, and MSP 3455G performs preprocessing such as carrier selection and filtering. Via the 3-line ADR-bus, the resulting signals are transferred to the DRP 3510A coprocessor, where the source decoding is performed. To be prepared for an upgrade to ADR with an additional DRP board, the following lines of MSP 34x5G should be provided on a feature connector: I2S_DA_IN1 or I2S_DA_IN2 I2S_DA_OUT I2S_WS I2S_CL ADR_CL, ADR_WS, ADR_DA For more details, please refer to the DRP 3510A data sheet.
PRELIMINARY DATA SHEET
2.10. Clock PLL Oscillator and Crystal Specifications The MSP 34x5G derives all internal system clocks from the 18.432 MHz oscillator. In NICAM or in I2SSlave mode, the clock is phase-locked to the corresponding source. Therefore, it is not possible to use NICAM and I2S-Slave mode at the same time. For proper performance, the MSP clock oscillator requires a 18.432-MHz crystal. Note, that for the phase-locked mode (NICAM, I2S slave), crystals with tighter tolerance are required.
2.9. Digital Control I/O Pins and Status Change Indication The static level of the digital input/output pins D_CTR_I/O_0/1 is switchable between HIGH and LOW via the I2C-bus by means of the ACB register (see page 34). This enables the controlling of external hardware switches or other devices via I2C-bus. The digital input/output pins can be set to high impedance by means of the MODUS register (see page 23). In this mode, the pins can be used as input. The current state can be read out of the STATUS register (see page 25). Optionally, the pin D_CTR_I/O_1 can be used as an interrupt request signal to the controller, indicating any changes in the read register STATUS. This makes polling unnecessary; I2C-bus interactions are reduced to a minimum (see STATUS register on page 25 and MODUS register on page 23).
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MSP 34x5G
response time is about 0.3 ms. If the MSP cannot accept another byte of data (e.g. while servicing an internal interrupt), it holds the clock line I2C_CL low to force the transmitter into a wait state. The I2C Bus Master must read back the clock line to detect when the MSP is ready to receive the next I2C transmission. The positions within a transmission where this may happen are indicated by 'Wait' in Section 3.1.3. The maximum wait period of the MSP during normal operation mode is less than 1 ms.
3. Control Interface 3.1. I2C Bus Interface The MSP 34x5G is controlled via the I2C bus slave interface. The IC is selected by transmitting one of the MSP 34x5G device addresses. In order to allow up to three MSP ICs to be connected to a single bus, an address select pin (ADR_SEL) has been implemented. With ADR_SEL pulled to high, low, or left open, the MSP 34x5G responds to different device addresses. A device address pair is defined as a write address and a read address (see Table 31). Writing is done by sending the write device address, followed by the subaddress byte, two address bytes, and two data bytes. Reading is done by sending the write device address, followed by the subaddress byte and two address bytes. Without sending a stop condition, reading of the addressed data is completed by sending the device read address and reading two bytes of data. Refer to Section 3.1.3. for the I2C bus protocol and to Section 3.4. "Programming Tips" on page 37 for proposals of MSP 34x5G I2C telegrams. See Table 32 for a list of available subaddresses. Besides the possibility of hardware reset, the MSP can also be reset by means of the RESET bit in the CONTROL register by the controller via I2C bus. Due to the architecture of the MSP 34x5G, the IC cannot react immediately to an I2C request. The typical Table 31: I2C Bus Device Addresses
ADR_SEL Mode MSP device address Low (connected to DVSS) Write 80hex Read 81hex
3.1.1. Internal Hardware Error Handling In case of any hardware problems (e.g. interruption of the power supply of the MSP), the MSP's wait period is extended to 1.8 ms. After this time period elapses, the MSP releases data and clock lines.
Indication and solving the error status: To indicate the error status, the remaining acknowledge bits of the actual I2C-protocol will be left high. Additionally, bit[14] of CONTROL is set to one. The MSP can then be reset via the I2C bus by transmitting the RESET condition to CONTROL.
Indication of reset: Any reset, even caused by an unstable reset line etc., is indicated in bit[15] of CONTROL. A general timing diagram of the I2C bus is shown in Fig. 427 on page 61.
High (connected to DVSUP) Write 84hex Read 85hex Write 88hex
Left Open Read 89hex
Table 32: I2C Bus Subaddresses
Name CONTROL WR_DEM RD_DEM WR_DSP RD_DSP Binary Value 0000 0000 0001 0000 0001 0001 0001 0010 0001 0011 Hex Value 00 10 11 12 13 Mode Read/Write Write Write Write Write Function Write: Software reset of MSP (see Table 33) Read: Hardware error status of MSP write address demodulator read address demodulator write address DSP read address DSP
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3.1.2. Description of CONTROL Register
PRELIMINARY DATA SHEET
Table 33: CONTROL as a Write Register
Name CONTROL Subaddress 00hex Bit[15] (MSB) 1 : RESET 0 : normal Bits[14:0] 0
Table 34: CONTROL as a Read Register
Name CONTROL Subaddress 00hex %LW>@ 06% RESET status after last reading of CONTROL: 0 : no reset occured 1 : reset occured Bit>@ Internal hardware status: 0 : no error occured 1 : internal error occured BitV>@ not of interest
Reading of CONTROL will reset the bits[15,14] of CONTROL. After Power-on, bit[15] of CONTROL will be set; it must be read once to be reset.
3.1.3. Protocol Description Write to DSP or Demodulator
S Wait write device address ACK sub-addr ACK addr-byte ACK addr-byte ACK data-byte ACK data-byte ACK P high low high low
Read from DSP or Demodulator
S Wait write device address ACK sub-addr ACK addr-byte ACK addr-byte ACK S high low read device address Wait ACK data-byte- ACK data-byte NAK P high low
Write to Control Register
S Wait write device address ACK sub-addr ACK data-byte ACK data-byte ACK P high low
Read from Control Register
S Wait write device address ACK 00hex ACK S read device address Wait ACK data-byte- ACK data-byte NAK P high low
Note: S = P= ACK = NAK =
I2C-Bus Start Condition from master I2C-Bus Stop Condition from master Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, light gray) or master (= controller, dark gray) Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate `End of Read' or from MSP indicating internal error state Wait = I2C-Clock line is held low, while the MSP is processing the I2C command. This waiting time is max. 1 ms
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MSP 34x5G
I2C_DA S I2C_CL
1 0 P
Fig. 31: I2C bus protocol (MSB first; data must be stable while clock is high)
3.1.4. Proposals for General MSP 34x5G I2C Telegrams 3.1.4.1. Symbols daw dar < > aa dd write device address (80hex, 84hex or 88hex) read device address (81hex, 85hex or 89hex) Start Condition Stop Condition Address Byte Data Byte
3.2. Start-Up Sequence: Power-Up and I2C-Controlling After POWER-ON or RESET (see Fig. 426), the IC is in an inactive state. All registers are in the Reset position (see Table 35 and Table 36), the analog outputs are muted. The controller has to initialize all registers for which a non-default setting is necessary.
3.3. MSP 34x5G Programming Interface 3.3.1. User Registers Overview
3.1.4.2. Write Telegrams
write to CONTROL register write data into demodulator write data into DSP
3.1.4.3. Read Telegrams
read data from CONTROL register read data from demodulator read data from DSP
The MSP 34x5G is controlled by means of user registers. The complete list of all user registers are given in Table 35 and Table 36. The registers are partitioned into the Demodulator section (Subaddress 10hex for writing, 11hex for reading) and the Baseband Processing sections (Subaddress 12hex for writing, 13hex for reading). Write and read registers are 16 bit wide, whereby the MSB is denoted bit[15]. Transmissions via I2C bus have to take place in 16-bit words (two byte transfers, with the most significant byte transferred first). All write registers, except the demodulator write registers are readable. Unused parts of the 16-bit write registers must be zero. Addresses not given in this table must not be accessed. For reasons of software compatibility to the MSP 34xxD, a Manual/Compatibility Mode is available. More read and write registers together with a detailed description can be found in "Appendix B: Manual/Compatibility Mode" on page 77.
3.1.4.4. Examples
<80 <80 <80 <80 <80 00 00 10 11 12 80 00 00 02 00 00> RESET MSP statically 00> Clear RESET 20 00 03> Set demodulator to stand. 03hex 00 <81 dd dd> Read STATUS 08 01 20> Set loudspeaker channel
source to NICAM and Matrix to STEREO
More examples of typical application protocols are listed in Section 3.4. "Programming Tips" on page 37.
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.
PRELIMINARY DATA SHEET
Table 35: List of MSP 34x5G Write Registers
Write Register Address (hex) Bits Description and Adjustable Range Reset See Page
I2C Sub-Address = 10hex ; Registers are not readable STANDARD SELECT MODUS I2S CONFIGURATION 00 20 00 30 00 40 [15:0] [15:0] [15:0] Initial Programming of the Demodulator Demodulator, Automatic and Configuration of I2S options I2 S options 00 00 00 00 00 00 21 23 24
I2C Sub-Address = 12hex ; Registers are all readable by using I2C Sub-Address = 13hex Volume loudspeaker channel Volume / Mode loudspeaker channel 00 00 [15:8] [7:0] [+12 dB ... -114 dB, MUTE] 1/8 dB Steps, Reduce Volume / Tone Control / Compromise / Dynamic [0..100 / 100 % and 100 /0..100 %] [-127..0 / 0 and 0 / -127..0 dB] [Linear /logarithmic mode] [+20 dB ... -12 dB] [+15 dB ... -12 dB] [0 dB ... +17 dB] [NORMAL, SUPER_BASS] [-100 %...OFF...+100 %] [SBE, SBE+PSE] [+12 dB ... -114 dB, MUTE] [FM/AM, NICAM, SCART, I S1, I S2] [SOUNDA, SOUNDB, STEREO, MONO...] [FM/AM, NICAM, SCART, I2S1, I2S2] [SOUNDA, SOUNDB, STEREO, MONO...] [FM/AM, NICAM, SCART, I2S1, I2S2] [SOUNDA, SOUNDB, STEREO, MONO...] [FM/AM, NICAM, SCART, I S1, I S2] [SOUNDA, SOUNDB, STEREO, MONO...] [00hex ... 7Fhex] [00hex ... 7Fhex] [NO_MAT, GSTERERO, KSTEREO] [00hex ... 7Fhex] (MSP 3410G, MSP 3450G only) [00hex ... 7Fhex] Bits[15:0] [00hex ... 7Fhex]/[00hex ... 7Fhex] [00hex ... 7Fhex] [off, on, decay time]
2 2 2 2
MUTE 00hex
29
Balance loudspeaker channel [L/R] Balance mode loudspeaker Bass loudspeaker channel Treble loudspeaker channel Loudness loudspeaker channel Loudness filter characteristic Spatial effect strength loudspeaker ch. Spatial effect mode/customize Volume SCART1 output channel Loudspeaker source select Loudspeaker channel matrix SCART1 source select SCART1 channel matrix I2S source select I2S channel matrix Quasi-peak detector source select Quasi-peak detector matrix Prescale SCART input Prescale FM/AM FM matrix Prescale NICAM Prescale I2S2 ACB : SCART Switches a. D_CTR_I/O Beeper Prescale I2S1 Automatic Volume Correction
00 01
[15:8] [7:0]
100 %/100 % linear mode 0 dB 0 dB 0 dB NORMAL OFF SBE+PSE MUTE FM/AM SOUNDA FM/AM SOUNDA FM/AM SOUNDA FM/AM SOUNDA 00hex 00hex NO_MAT 00hex 10hex 00hex 0/0 10hex off
30
00 02 00 03 00 04
[15:8] [15:8] [15:8] [7:0]
31 31 32
00 05
[15:8] [7:0]
33
00 07 00 08
[15:8] [15:8] [7:0]
34 28 28 28 28 28 28 28 28 27 26 27 27 27 34 35 27 30
00 0A
[15:8] [7:0]
00 0B
[15:8] [7:0]
00 0C
[15:8] [7:0]
00 0D 00 0E
[15:8] [15:8] [7:0]
00 10 00 12 00 13 00 14 00 16 00 29
[15:8] [15:8] [15:0] [15:0] [15:8] [15:8]
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Table 36: List of MSP 34x5G Read Registers
Read Register Address (hex) Bits Description and Adjustable Range See Page
I2C Sub-Address = 11hex ; Registers are not writable STANDARD RESULT STATUS
2
00 7E 02 00
[15:0] [15:0]
Result of Automatic Standard Detection (see Table 38) (MSP 3415G, MSP 3440G, MSP 3455G only) Monitoring of internal settings e.g. Stereo, Mono, Mute etc.
25 25
I C Sub-Address = 13hex ; Registers are not writable Quasi-peak readout left Quasi-peak readout right MSP hardware version code MSP major revision code MSP product code MSP ROM version code 00 1F 00 19 00 1A 00 1E [15:0] [15:0] [15:8] [7:0] [15:8] [7:0] [00hex ... 7FFFhex] 16 bit two's complement [00hex ... 7FFFhex] 16 bit two's complement [00hex ... FFhex] [00hex ... FFhex] [00hex ... FFhex] [00hex ... FFhex] 36 36 36 36 36 36
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3.3.2. Description of User Registers Table 37: Standard Codes for STANDARD SELECT register
MSP Standard Code (Data in hex) TV Sound Standard Automatic Standard Detection 00 01 Starts Automatic Standard Detection and sets detected standard Standard Selection 00 02 00 03 00 04 00 05 00 06 M-Dual FM-Stereo B/G-Dual FM-Stereo1) 4.5/4.724212 5.5/5.7421875 6.5/6.2578125 6.5/6.7421875
3)
PRELIMINARY DATA SHEET
Sound Carrier Frequencies in MHz
MSP 34x5G Version
all
3405, -15, -25, -45, -55 3405, -15, -55
D/K1-Dual FM-Stereo2) D/K2-Dual FM-Stereo2) D/K -FM-Mono with HDEV3 , not detectable by Automatic Standard Detection, for China HDEV33) SAT-Mono (i.e. Eutelsat, s. Table 618)
6.5
00 07 00 08 00 09 00 0A 00 0B 00 0C 00 0D 00 20 00 21 00 30 00 40 00 50 00 51 00 60
1) 2) 3) 4)
D/K3-Dual FM-Stereo B/G-NICAM-FM L-NICAM-AM I-NICAM-FM D/K-NICAM-FM 2) D/K-NICAM-FM with HDEV24), not detectable by Automatic Standard Detection, for China D/K-NICAM-FM with HDEV33), not detectable by Automatic Standard Detection, for China BTSC-Stereo BTSC-Mono + SAP M-EIA-J Japan Stereo FM-Stereo Radio with 75 µs Deemphasis SAT-Mono (see Table 618) SAT-Stereo (see Table 618) SAT ADR (Astra Digital Radio)
1)
6.5/5.7421875 5.5/5.85 6.5/5.85 6.0/6.552 6.5/5.85 6.5/5.85 6.5/5.85 4.5 3425, -45, -55 3415, -55
4.5 10.7 6.5 7.02/7.20 6.12
3425, -45, -55 3425, -45, -55 3405, -15, -55
In case of Automatic Sound Select, the B/G-codes 3hex and 8hex are equivalent. In case of Automatic Sound Select, the D/K-codes 4hex, 5hex, 7hex, and Bhex are equivalent. HDEV3: Max. FM deviation must not exceed 540 kHz HDEV2: Max. FM deviation must not exceed 360 kHz
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MSP 34x5G
3.3.2.2. Refresh of STANDARD SELECT Register A general refresh of the STANDARD SELECT register is not allowed. However, the following method enables watching the MSP 34x5G "alive" status and detection of accidental resets (only versions B6 and later): After Power-on, bit[15] of CONTROL will be set; it must be read once to enable the reset-detection feature. Reading of the CONTROL register and checking the reset indicator bit[15] . If bit[15] is "0", any refresh of the STANDARD SELECT register is not allowed. If bit[15] is "1", indicating a reset, a refresh of the STANDARD SELECT register and all other MSPG registers is required.
3.3.2.1. STANDARD SELECT Register The TV sound standard of the MSP 34x5G demodulator is determined by the STANDARD SELECT register. There are two ways to use the STANDARD SELECT register: Setting up the demodulator for a TV sound standard by sending the corresponding standard code with a single I2C bus transmission. Starting the Automatic Standard Detection for terrestrial TV standards. This is the most comfortable way to set up the demodulator (not for MSP 3435G). Within 0.5 s the detection and setup of the actual TV sound standard is performed. The detected standard can be read out of the STANDARD RESULT register by the control processor. This feature is recommended for the primary setup of a TV set. Outputs should be muted during Automatic Standard Detection. The Standard Codes are listed in Table 37. Selecting a TV sound standard via the STANDARD SELECT register initializes the demodulator. This includes: AGC-settings and carrier mute, tuning frequencies, FIR-filter settings, demodulation mode (FM, AM, NICAM), deemphasis and identification mode. TV stereo sound standards that are unavailable for a specific MSP version are processed in analog mono sound of the standard. In that case, stereo or bilingual processing will not be possible. For a complete setup of the TV sound processing from analog IF input to the source selection, the transmissions as shown in Section 3.5. are necessary. For reasons of software compatibility to the MSP 34xxD, a Manual/Compatibility mode is available. A detailed description of this mode can be found on page 77.
3.3.2.3. STANDARD RESULT Register If Automatic Standard Detection is selected in the STANDARD SELECT register, status and result of the Automatic Standard Detection process can be read out of the STANDARD RESULT register. The possible results are based on the mentioned Standard Code and are listed in Table 38. In cases where no sound standard has been detected (no standard present, too much noise, strong interferers, etc.) the STANDARD RESULT register contains 00 00hex. In that case, the controller has to start further actions (for example set the standard according to a preference list or by manual input). As long as the STANDARD RESULT register contains a value greater than 07 FFhex, the Automatic Standard Detection is still active. During this period, the MODUS and STANDARD SELECT register must not be written. The STATUS register will be updated when the Automatic Standard Detection has finished. If a present sound standard is unavailable for a specific MSP-version, it detects and switches to the analog mono sound of this standard. Example: The MSPs 3425G and 3445G will detect a B/G-NICAM signal as standard 3 and will switch to the analog FMMono sound.
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Table 38: Results of the Automatic Standard Detection
Broadcasted Sound Standard Automatic Standard Detection could not find a sound standard B/G-FM B/G-NICAM I FM-Radio M-Korea M-Japan M-BTSC STANDARD RESULT Register Read 007Ehex 0000hex
PRELIMINARY DATA SHEET
0003hex 0008hex 000Ahex 0040hex 0002hex (if MODUS[14,13]=00) 0020hex (if MODUS[14,13]=01) 0030hex (if MODUS[14,13]=10)
L-AM D/K1 D/K2 D/K3 L-NICAM D/K-NICAM Automatic Standard Detection still active
0009hex (if MODUS[12]=0) 0004hex (if MODUS[12]=1) 0009hex (if MODUS[12]=0) 000Bhex (if MODUS[12]=1) >07FFhex
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MSP 34x5G
3.3.2.4. Write Registers on I2C Subaddress 10hex Table 39: Write registers on I2C subaddress 10hex Register Address 00 20hex Function STANDARD SELECTION Register Defines TV-Sound or FM-Radio Standard bit[15:0] 00 01hex 00 02hex ... 00 60hex start Automatic Standard Detection MSP Standard Codes (see Table 37) Name STANDARD_SEL
00 30hex
MODUS Register Preference in Automatic Standard Detection: bit[15] bit[14:13] 0 1 2 3 bit[12] 0 1 0 undefined, must be 0 detected 4.5 MHz carrier is interpreted as:1) standard M (Korea) standard M (BTSC) standard M (Japan) chroma carrier (M/N standards are ignored) detected 6.5 MHz carrier is interpreted as:1) standard L (SECAM) standard D/K1, D/K2, D/K3, or D/K NICAM
MODUS
General MSP 34x5G Options bit[11:8] bit[7] bit[6] 0 1 bit[5] bit[4] bit[3] 0 0/1 0/1 0 0/1 undefined, must be 0 active/tristate state of audio clock output pin AUD_CL_OUT I2S word strobe alignment WS changes at data word boundary WS changes one clock cycle in advance master/slave mode of I2S interface (must be set to 0 (= Master) in case of NICAM mode) active/tristate state of I2S output pins state of digital output pins D_CTR_I/O_0 and _1 active: D_CTR_I/O_0 and _1 are output pins (can be set by means of the ACB register. see also: MODUS[1]) tristate: D_CTR_I/O_0 and _1 are input pins (level can be read out of STATUS[4,3]) undefined, must be 0 disable/enable STATUS change indication by means of the digital I/O pin D_CTR_I/O_1 Necessary condition: MODUS[3] = 0 (active)
1 bit[2] bit[1] 0 0/1
bit[0]
1)
0/1off/on: Automatic Sound Select
Valid at the next start of Automatic Standard Detection.
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Table 39: Write registers on I2C subaddress 10hex, continued Register Address 00 40hex Function I2S CONFIGURATION Register bit[15:1] bit[0] 0 1 0 not used, must be set to "0"
PRELIMINARY DATA SHEET
Name I2S_CONFIG
I2S_CL frequency and I2S data sample length for master mode 2 x 16 bit (1.024 MHz) 2 x 32 bit (2.048 MHz))
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MSP 34x5G
3.3.2.5. Read Registers on I2C Subaddress 11hex Table 310: Read Registers on I2C Subaddress 11hex Register Address 00 7Ehex Function STANDARD RESULT Register Readback of the detected TV sound or FM-Radio Standard bit[15:0] 00 00hex Automatic Standard Detection could not find a sound standard MSP Standard Codes (see Table 38) Name STANDARD_RES
00 02hex ... 00 40hex >07 FFhexAutomatic Standard Detection still active 02 00hex STATUS Register
STATUS
Contains all user relevant internal information about the status of the MSP bit[15:10] bit[8] 0/1 undefined "1" indicates bilingual sound mode or SAP present (internally evaluated from received analog or digital identification signals) "1" indicates independent mono sound (only for NICAM) mono/stereo indication (internally evaluated from received analog or digital identification signals) analog sound standard (FM or AM) active this pattern will not occur digital sound (NICAM) available bad reception condition of digital sound (NICAM) due to: a. high error rate b. unimplemented sound code c. data transmission only low/high level of digital I/O pin D_CTR_I/O_1 low/high level of digital I/O pin D_CTR_I/O_0 detected secondary carrier (2nd A2 or SAP sub-carrier) no secondary carrier detected detected primary carrier (Mono or MPX carrier) no primary carrier detected undefined
bit[7] bit[6]
0/1 0/1
bit[5,9]
00 01 10 11
bit[4] bit[3] bit[2] bit[1] bit[0]
0/1 0/1 0 1 0 1
If STATUS change indication is activated by means of MODUS[1]: Each change in the STATUS register sets the digital I/O pin D_CTR_I/O_1 to high level. Reading the STATUS register resets D_CTR_I/O_1.
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3.3.2.6. Write Registers on I2C Subaddress 12hex Table 311: Write Registers on I2C Subaddress 12hex Register Address Function
PRELIMINARY DATA SHEET
Name
PREPROCESSING 00 0Ehex FM/AM Prescale bit[15:8] 00hex ... 7Fhex 00hex Defines the input prescale gain for the demodulated FM or AM signal off (RESET condition) PRE_FM
For all FM modes except satellite FM and AM-mode, the combinations of prescale value and FM deviation listed below lead to internal full scale. FM mode bit[15:8] 7Fhex 48hex 30hex 24hex 18hex 13hex 28 kHz FM deviation 50 kHz FM deviation 75 kHz FM deviation 100 kHz FM deviation 150 kHz FM deviation 180 kHz FM deviation (limit)
FM high deviation mode (HDEV2, MSP Standard Code = Chex) bit[15:8] 30hex 14hex 150 kHz FM deviation 360 kHz FM deviation (limit)
FM very high deviation mode (HDEV3, MSP Standard Code = 6 and Dhex) bit[15:8] 20hex 1Ahex 450 kHz FM deviation 540 kHz FM deviation (limit)
Satellite FM with adaptive deemphasis bit[15:8] 10hex recommendation
AM mode (MSP Standard Code = 9) bit[15:8] 7Chex recommendation for SIF input levels from 0.1 Vpp to 0.8 Vpp (Due to the AGC being switched on, the AM-output level remains stable and independent of the actual SIF-level in the mentioned input range)
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Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address
(continued)
Function FM Matrix Modes Defines the dematrix function for the demodulated FM signal bit[7:0] 00hex 01hex 02hex 03hex 04hex no matrix (used for bilingual and unmatrixed stereo sound) German stereo (Standard B/G) Korean stereo (also used for BTSC, EIA-J and FM Radio) sound A mono (left and right channel contain the mono sound of the FM/AM mono carrier) sound B mono
Name FM_MATRIX
00 0Ehex
In case of Automatic Sound Select = on, the FM Matrix Mode is set automatically. Writing to the FM/AM prescale register (00 0Ehex high part) is still allowed. In order not to disturb the automatic process, the low part of any I2C transmission to this register is ignored. Therefore, any FM-Matrix readback values may differ from data written previously. In case of Automatic Sound Select = off, the FM Matrix Mode must be set as shown in Table 617 of Appendix B. To enable a Forced Mono Mode for all analog stereo systems by overriding the internal pilot or identification evaluation, the following steps must be transmitted: 1. MODUS with bit[0] = 0 (Automatic Sound Select off) 2. FM Presc./Matrix with FM Matrix = Sound A Mono (SAP: Sound B Mono) 3. Select FM/AM source channel, with channel matrix set to "Stereo" (transparent) 00 10hex NICAM Prescale Defines the input prescale value for the digital NICAM signal bit[15:8] 00hex ... 7Fhex prescale gain examples: 00hex 20hex 5Ahex 7Fhex 00 16hex 00 12hex I2S1 Prescale I2S2 Prescale Defines the input prescale value for digital I2S input signals bit[15:8] 00hex ... 7Fhex prescale gain examples: 00hex off 0 dB gain (recommendation, RESET condition) 10hex +18 dB gain (maximum gain) 7Fhex 00 0Dhex SCART Input Prescale Defines the input prescale value for the analog SCART input signal bit[15:8] 00hex ... 7Fhex prescale gain examples: 00hex off (RESET condition) 0 dB gain (2 VRMS input leads to digital full scale) 19hex 7Fhex +14 dB gain (400 mVRMS input leads to digital full scale) PRE_SCART off 0 dB gain 9 dB gain (recommendation) +12 dB gain (maximum gain) PRE_I2S1 PRE_I2S2 PRE_NICAM
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Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address Function
PRELIMINARY DATA SHEET
Name
SOURCE SELECT AND OUTPUT CHANNEL MATRIX 00 08hex 00 0Ahex 00 0Bhex 00 0Chex Source for: Loudspeaker Output SCART1 DA Output I2S Output Quasi-Peak Detector bit[15:8] 0 1 "FM/AM": demodulated FM or AM mono signal "Stereo or A/B": demodulator Stereo or A/B signal (in manual mode, this source is identical to the NICAM source in the MSP 3410D) "Stereo or A": demodulator Stereo Sound or Language A (only defined for Automatic Sound Select) "Stereo or B": demodulator Stereo Sound or Language B (only defined for Automatic Sound Select) SCART input I2S1 input I2S2 input SRC_MAIN SRC_SCART1 SRC_I2S SRC_QPEAK
3 4 2 5 6
For demodulator sources, see Table 22. 00 08hex 00 0Ahex 00 0Bhex 00 0Chex Matrix Mode for: Loudspeaker Output SCART1 DA Output I2S Output Quasi-Peak Detector bit[7:0] Sound A Mono (or Left Mono) (RESET condition) 00hex Sound B Mono (or Right Mono) 10hex 20hex Stereo (transparent mode) Mono (sum of left and right inputs divided by 2) 30hex special modes are available (see Section 6.5.1. on page 89) MAT_MAIN MAT_SCART1 MAT_I2S MAT_QPEAK
In Automatic Sound Select mode, the demodulator source channels are set according to Table 22. Therefore, the matrix modes of the corresponding output channels should be set to "Stereo" (transparent).
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PRELIMINARY DATA SHEET
MSP 34x5G
Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address Function Name
LOUDSPEAKER PROCESSING 00 00hex Volume Loudspeaker bit[15:8] volume table with 1 dB step size +12 dB (maximum volume) 7Fhex +11 dB 7Ehex ... 74hex +1 dB 0 dB 73hex -1 dB 72hex ... -113 dB 02hex -114 dB 01hex Mute (RESET condition) 00hex FFhex Fast Mute (needs about 75 ms until the signal is completely ramped down) higher resolution volume table +0 dB 0 +0.125 dB increase in addition to the volume table 1 ... 7 +0.875 dB increase in addition to the volume table 0 must be set to 0 VOL_MAIN
bit[7:5]
bit[4] bit[3:0]
clipping mode 0 reduce volume 1 reduce tone control 2 compromise 3 dynamic
With large scale input signals, positive volume settings may lead to signal clipping. The MSP 34x5G loudspeaker and headphone volume function is divided into a digital and an analog section. With Fast Mute, volume is reduced to mute position by digital volume only. Analog volume is not changed. This reduces any audible DC plops. To turn volume on again, the volume step that has been used before Fast Mute was activated must be transmitted. If the clipping mode is set to "reduce volume", the following rule is used: To prevent severe clipping effects with bass, treble, or equalizer boosts, the internal volume is automatically limited to a level where, in combination with either bass, treble, or equalizer setting, the amplification does not exceed 12 dB. If the clipping mode is "reduce tone control", the bass or treble value is reduced if amplification exceeds 12 dB. If the equalizer is switched on, the gain of those bands is reduced, where amplification together with volume exceeds 12 dB. If the clipping mode is "compromise", the bass or treble value and volume are reduced half and half if amplification exceeds 12 dB. If the equalizer is switched on, the gain of those bands is reduced half and half, where amplification together with volume exceeds 12 dB. If the clipping mode is "dynamic", volume is reduced automatically if the signal amplitudes would exceed -2 dBFS within the IC.
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Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address 00 29hex Function Automatic Volume Correction (AVC) Loudspeaker Channel bit[15:12] 00hex 08hex bit[11:8] 08hex 04hex 02hex 01hex AVC off (and reset internal variables) AVC on
PRELIMINARY DATA SHEET
Name
AVC AVC_DECAY
8 sec decay time 4 sec decay time (recommended) 2 sec decay time 20 ms decay time (should be used for approx. 100 ms after channel change)
Note: AVC should not be used in any Dolby Prologic mode (with DPL35xx), except in PANORAMA or 3D-PANORAMA mode, when only the loudspeaker output is active. 00 01hex Balance Loudspeaker Channel bit[15:8] Linear Mode 7Fhex Left muted, Right 100% Left 0.8%, Right 100% 7Ehex ... Left 99.2%, Right 100% 01hex Left 100%, Right 100% 00hex Left 100%, Right 99.2% FFhex ... 82hex Left 100%, Right 0.8% Left 100%, Right muted 81hex Logarithmic Mode 7Fhex Left -127 dB, Right 0 dB Left -126 dB, Right 0 dB 7Ehex ... 01hex Left -1 dB, Right 0 dB Left 0 dB, Right 0 dB 00hex Left 0 dB, Right -1 dB FFhex ... Left 0 dB, Right -127 dB 81hex 80hex Left 0 dB, Right -128 dB Balance Mode linear 00hex logarithmic 01hex BAL_MAIN
bit[15:8]
bit[7:0]
Positive balance settings reduce the left channel without affecting the right channel; negative settings reduce the right channel leaving the left channel unaffected.
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PRELIMINARY DATA SHEET
MSP 34x5G
Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address 00 02hex Function Bass Loudspeaker Channel bit[15:8] extended range +20 dB 7Fhex +18 dB 78hex +16 dB 70hex 68hex +14 dB normal range 60hex +12 dB +11 dB 58hex ... +1 dB 08hex 0 dB 00hex F8hex -1 dB ... -11 dB A8hex -12 dB A0hex Higher resolution is possible: An LSB step in the normal range results in a gain step of about 1/8 dB, in the extended range about 1/4 dB. With positive bass settings, internal clipping may occur even with overall volume less than 0 dB. This will lead to a clipped output signal. Therefore, it is not recommended to set bass to a value that, in conjunction with volume, would result in an overall positive gain. 00 03hex Treble Loudspeaker Channel bit[15:8] 78hex 70hex ... 08hex 00hex F8hex ... A8hex A0hex TREB_MAIN Name BASS_MAIN
+15 dB +14 dB +1 dB 0 dB -1 dB -11 dB -12 dB
Higher resolution is possible: An LSB step results in a gain step of about 1/8 dB. With positive treble settings, internal clipping may occur even with overall volume less than 0 dB. This will lead to a clipped output signal. Therefore, it is not recommended to set treble to a value that, in conjunction with volume, would result in an overall positive gain.
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Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address 00 04hex Function Loudness Loudspeaker Channel bit[15:8] Loudness Gain +17 dB 44hex +16 dB 40hex ... 04hex +1 dB +0.75 dB 03hex +0.5 dB 02hex +0.25 dB 01hex 0 dB 00hex Loudness Mode 00hex normal (constant volume at 1kHz) 04hex Super Bass (constant volume at 2kHz)
PRELIMINARY DATA SHEET
Name LOUD_MAIN
bit[7:0]
Higher resolution of Loudness Gain is possible: An LSB step results in a gain step of about 1/4 dB. Loudness increases the volume of low and high frequency signals, while keeping the amplitude of the reference frequency constant. The intended loudness has to be set according to the actual volume setting. Because loudness introduces gain, it is not recommended to set loudness to a value that, in conjunction with volume, would result in an overall positive gain. The corner frequency for bass amplification can be set to two different values. In Super Bass mode, the corner frequency is shifted up. The point of constant volume is shifted from 1 kHz to 2 kHz.
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PRELIMINARY DATA SHEET
MSP 34x5G
Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address 00 05hex Function Spatial Effects Loudspeaker Channel bit[15:8] Effect Strength Enlargement 100% 7Fhex Enlargement 50% 3Fhex ... 01hex Enlargement 1.5% Effect off 00hex reduction 1.5% FFhex ... reduction 50% C0hex reduction 100% 80hex Spatial Effect Mode 0hex Stereo Basewidth Enlargement (SBE) and Pseudo Stereo Effect (PSE). (Mode A) Stereo Basewidth Enlargement (SBE) only. (Mode B) 2hex Spatial Effect High-Pass Gain 0hex max high-pass gain 2/3 high-pass gain 2hex 4hex 1/3 high-pass gain min high-pass gain 6hex automatic 8hex Name SPAT_MAIN
bit[7:4]
bit[3:0]
There are several spatial effect modes available: In Mode A (low byte = 00hex), the spatial effect depends on the source mode. If the incoming signal is mono, Pseudo Stereo Effect is active; for stereo signals, Pseudo Stereo Effect and Stereo Basewidth Enlargement is effective. The strength of the effect is controllable by the upper byte. A negative value reduces the stereo image. A strong spatial effect is recommended for small TV sets where loudspeaker spacing is rather close. For large screen TV sets, a more moderate spatial effect is recommended. In Mode B, only Stereo Basewidth Enlargement is effective. For mono input signals, the Pseudo Stereo Effect has to be switched on. It is worth mentioning that all spatial effects affect amplitude and phase response. With the lower 4 bits, the frequency response can be customized. A value of 0hex yields a flat response for center signals (L = R) but a high-pass function for L or R only signals. A value of 6hex has a flat response for L or R only signals but a low-pass function for center signals. By using 8hex, the frequency response is automatically adapted to the sound material by choosing an optimal high-pass gain.
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Table 311: Write Registers on I2C Subaddress 12hex, continued Register Address Function
PRELIMINARY DATA SHEET
Name
SCART OUTPUT CHANNEL 00 07hex Volume SCART1 Output Channel bit[15:8] volume table with 1 dB step size +12 dB (maximum volume) 7Fhex +11 dB 7Ehex ... 74hex +1 dB 0 dB 73hex -1 dB 72hex ... -113 dB 02hex -114 dB 01hex Mute (RESET condition) 00hex higher resolution volume table +0 dB 0 +0.125 dB increase in addition to the volume table 1 ... +0.875 dB increase in addition to the volume table 7 01hex this must be 01hex VOL_SCART1
bit[7:5]
bit[4:0]
SCART SWITCHES AND DIGITAL I/O PINS 00 13hex ACB Register Defines the level of the digital output pins and the position of the SCART switches bit[15] bit[14] bit[13:5] 0/1 0/1 low/high of digital output pin D_CTR_I/O_1 (MODUS[3]=0) low/high of digital output pin D_CTR_I/O_0 (MODUS[3]=0) ACB_REG
SCART DSP Input Select xxxx00xx0 S