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THIS SPECIFICATION IS THE PROPERTY OF BOE DT AND SHALL NOT BE
REPRODUCED OR COPIED WITHOUT THE WRITTEN PERMISSION OF BOE DT
AND MUST BE RETURNED TO BOE DT UPON ITS REQUEST
TITLE:
HV320WX2-201 Preliminary Product Specification
BEIJING BOE DISPLAY TECHNOLOGY
SPEC. NUMBER PRODUCT GROUP REV. ISSUE DATE PAGE
S8XX-XXXX TFT LCD P0 2011.07. 29. 1 of 22
B2010-8002-O (1/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
TFT LCD P0 2011.07.29
REVISION HISTORY
REV. ECN NO. DESCRIPTION OF CHANGES DATE PREPARED
P0 - Initial Release 2011.07.29 S. M. Lee
SPEC. NUMBER SPEC. TITLE PAGE
S8XX-XXXX HV320WX2-201 Preliminary Product Specification 2 of 22
B2010-8002-O (2/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
TFT LCD P0 2011.07.29
Contents
No ITEM Page
REVISIONS HISTORY 2
CONTENTS 3
1 GENERAL DESCRIPTION 4
1.1 Introduction
1.2 Features
1.3 Applications
1.4 General Specification
2 ABSOLUTE MAXIMUM RATINGS 6
3 ELECTRICAL SPECIFICATIONS 7
3.1 TFT LCD Open Cell
4 INTERFACE CONNECTION 8
4.1 Open Cell Input Signal & Power
4.2 LVDS Interface
5 SIGNAL TIMING SPECIFICATIONS 10
5.1 Timing Parameters
5.2 Signal Timing Waveform
5.3 Input Signals, Basic Display Colors & Cray Scale Of Colors
5.4 Power Sequence
6 OPTICAL SPECIFICATIONS 14
7 MECHANICAL CHARACTERISTICS 16
8 PRODUCT SERIAL NUMBER 17
9 PACKING INFORMATION 18
10 HANDING & CAUTIONS 20
11 APPENDIX 21
SPEC. NUMBER SPEC. TITLE PAGE
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B2010-8002-O (3/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
TFT LCD P0 2011.07.29
1.0 GENERAL DESCRIPTION
1.1 Introduction
HV320WX2-201 is a color active matrix TFT LCD open cell using amorphous silicon TFT's
(Thin Film Transistors) as an active switching devices. This open cell has a 31.51 inch
diagonally measured active area with WXGA resolutions (1366 horizontal by 768 vertical
pixel array). Each pixel is divided into RED, GREEN, BLUE dots which are arranged in
vertical stripe and this open cell can display 16.7M colors. The TFT-LCD panel used for
this open cell is adapted for a low reflection and higher color type.
RGB(Mini-LVDS)
VDD Source Driver Circuit
+12.0V
S1 S1366
LVDS
G1
5pairs CN1
Gate Driver Circuit
Timing Controller
LVDS_SEL
(30pin)
#9 [LVDS Rx & Mini-LVDS
Tx integrated]
BIST_ TFT - LCD Panel
# 27 (1366 RGB 768 pixels)
Power Circuit G768
Block
1.2 Features
z LVDS interface with 1 pixel / clock
z High-speed response
z Low color shift image quality
z 8-bit color depth, display 16.7M colors
z High luminance and contrast ratio, low reflection and wide viewing angle
z DE (Data Enable) only mode
z AFFS technology is applied for high display quality
z RoHS compliant
SPEC. NUMBER SPEC. TITLE PAGE
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B2010-8002-O (3/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
TFT LCD P0 2011.07.29
1.3 Application
z Home Alone Multimedia TFT-LCD TV
z Display Terminals for Control System
z High Definition TV(HD TV)
z AV application Products
1.4 General Specification
< Table 1. General Specifications >
Parameter Specification Unit Remark
Active area 697.685(H) 392.256(V) mm
Number of pixels 1366(H) 768(V) pixels
Pixel pitch 170.25(H) RGB 510.75(V)
Pixel arrangement Pixels RGB Vertical stripe
Display colors 16.7M(8bits-true) colors
Display mode Transmission mode, Normally Black
Open Cell At center point
6.0 (typ.) %
Transmittance with BOE BLU
Weight 1180 (typ.) gram
Power Consumption 4.0 (typ.) Watt
Haze 10%, 3H, Semi-glare or Anti-
Surface Treatment glare treatment (Front Polarizer)
Clear (Bottom Polarizer)
SPEC. NUMBER SPEC. TITLE PAGE
S8XX-XXXX HV320WX2-201 Preliminary Product Specification 5 of 22
B2010-8002-O (3/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
TFT LCD P0 2011.07.29
2.0 ABSOLUTE MAXIMUM RATINGS
The followings are maximum values which, if exceed, may cause faulty operation or
damage to the unit. The operational and non-operational maximum voltage and current
values are listed in Table 2.
< Table 2. Open Cell Electrical Specifications > [VSS=GND=0V]
Parameter Symbol Min. Max. Unit Remark
Power Supply Voltage VDD VSS-0.3 13.2 V Ta = 25
TOP 0 +50
Operating Temperature
TSUR 0 +60
Storage Temperature TST -20 +60
Note 1
Operating Ambient
Hop 10 80 %RH
Humidity
Storage Humidity Hst 10 80 %RH
Note 1 : Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 max. and no condensation of water.
C
SPEC. NUMBER SPEC. TITLE PAGE
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B2010-8002-O (3/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
TFT LCD P0 2011.07.29
3.0 ELECTRICAL SPECIFICATIONS
3.1 TFT LCD Open Cell
< Table 3. Open Cell Electrical Specifications > [Ta =25 2 ]
Values
Parameter Symbol Unit Remark
Min Typ Max
Power Supply Input Voltage VDD 10.8 12 13.2 Vdc
Power Supply Ripple Voltage VRP 300 mV
Power Supply Current IDD - 333 525 mA
Note 1
Power Consumption PDD 4.0 6.3 Watt
Rush current IRUSH - - 3.0 A Note 2
Differential Input High
VLVTH +100 +300 mV
Threshold Voltage
LVDS
Interface Differential Input Low
VLVTL -300 -100 mV
Threshold Voltage
Common Input Voltage VLVC 1.0 1.2 1.4 V
Input High Threshold
VIH 2.7 - 3.3 V
CMOS Voltage
Interface Input Low Threshold
VIL 0 - 0.6 V
Voltage
Note 1 : The supply voltage is measured and specified at the interface connector of LCM.
The current draw and power consumption specified is for VDD=12.0V,
Frame rate fV=60Hz and Clock frequency = 75.4MHz.
Test Pattern of power supply current
a) Typ : Mosaic 8 x 6 Pattern(L0/L255) b) Max : Skip 1H2V Sub Dot
Pattern(L0/L255)
Note 2 : The duration of rush current is about 2ms and rising time of Power Input is 1ms(min)
SPEC. NUMBER SPEC. TITLE PAGE
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B2010-8002-O (3/3) A4(210 X 297)
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PRODUCT GROUP REV ISSUE DATE
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4.0 INTERFACE CONNECTION
4.1 Module Input Signal & Power
- Connector : IS100-L30B-C23(Manufactured by UJU) or Equivalent.
< Table 4. Open Cell Input Connector Pin Configuration >
Pin Pin
Symbol Description Symbol Description
No No
1 VDD Power Supply +12.0V 16 RX1+ LVDS Receiver Signal(+)
2 VDD Power Supply +12.0V 17 GND Ground
3 VDD Power Supply +12.0V 18 RX2- LVDS Receiver Signal(-)
4 VDD Power Supply +12.0V 19 RX2+ LVDS Receiver Signal(+)
5 GND Ground 20 GND Ground
6 GND Ground 21 RCLK- LVDS Receiver Clock Signal(-)
7 GND Ground 22 RCLK+ LVDS Receiver Clock Signal(+)
8 GND Ground 23 GND Ground
9 LVDS_SEL `L'=JEIDA , `H'or NC= VESA 24 RX3- LVDS Receiver Signal(-)
10 NC No Connection 25 RX3+ LVDS Receiver Signal(+)
11 GND Ground 26 GND Ground
`L' or NC=Free run mode ,
12 RX0- LVDS Receiver Signal(-) 27 BIST
`H'= BIST mode
13 RX0+ LVDS Receiver Signal(+) 28 NC No Connection
14 GND Ground 29 NC No Connection
15 RX1- LVDS Receiver Signal(-) 30 GND Ground
Notes : 1. NC(Not Connected) : This pins are only used for BOE internal operations.
2. Input Level of LVDS signal is based on the IEA 664 Standard.
3. LVDS_SEL : This pin is used for selecting LVDS signal data format.
If this Pin : High (3.3V) or Open (NC)