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STD845DN40
Dual NPN high voltage transistors in a single package
Preliminary data
Features
Low VCE(sat)
Simplified circuit design
Reduced component count
8
Fast switching speed
4
1
Applications
Compact fluorescent lamp (CFL) 220 V mains DIP-8
Electronic ballast for fluorescent lighting
Description
Figure 1. Internal schematic diagram
The device is a dual NPN high voltage power
transistor manufactured using multi-epitaxial
planar technology. It is housed in dual-island DIP-
8 package with separated terminals to provide a
high degree of assembly flexibility.
Table 1. Device summary
Order code Marking Package Packaging
STD845DN40 D845DN40 DIP-8 Tube
April 2010 Doc ID 17211 Rev 2 1/10
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to www.st.com 10
change without notice.
Electrical ratings STD845DN40
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
VCBO Collector-base voltage (IE = 0) 700 V
VCEO Collector-emitter voltage (IB = 0) 400 V
VEBO Emitter-base voltage (IC = 0, IB = 2 A, tp < 10 ms) V(BR)EBO V
IC Collector current 4 A
ICM Collector peak current (tP < 5 ms) 8 A
IB Base current 2 A
IBM Base peak current (tP < 5 ms) 4 A
Total dissipation at Tamb = 25