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DISCRETE SEMICONDUCTORS
DATA SHEET
BF1212; BF1212R; BF1212WR
N-channel dual-gate MOS-FETs
Product specification 2003 Nov 14
NXP Semiconductors Product specification
BF1212; BF1212R;
N-channel dual-gate MOS-FETs
BF1212WR
FEATURES PINNING
Short channel transistor with high forward transfer PIN DESCRIPTION
admittance to input capacitance ratio
1 source
Low noise gain controlled amplifier
2 drain
Excellent low frequency noise performance
3 gate 2
Partly internal self-biasing circuit to ensure good
4 gate 1
cross-modulation performance during AGC and good
DC stabilization.
APPLICATIONS 4
handbook, 2 columns 3
Gain controlled low noise VHF and UHF amplifiers for
5 V digital and analog television tuner applications.
1 2
DESCRIPTION
Top view MSB014
Enhancement type N-channel field-effect transistor with
source and substrate interconnected. Integrated diodes
between gates and source protect against excessive input BF1212; marking code: LGp
voltage surges. The BF1212, BF1212R and BF1212WR
are encapsulated in the SOT143B, SOT143R and Fig.1 Simplified outline (SOT143B).
SOT343R plastic packages respectively.
3
handbook, 2 columns 4 handbook, halfpage 3 4
2 1
2 1
Top view MSB035 Top view MSB842
BF1212R; marking code: LKp BF1212WR; marking code: ML
Fig.2 Simplified outline (SOT143R). Fig.3 Simplified outline (SOT343R).
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VDS drain-source voltage 6 V
ID drain current 30 mA
Ptot total power dissipation 180 mW
yfs forward transfer admittance 28 33 43 mS
Cig1-ss input capacitance at gate 1 1.7 2.2 pF
Crss reverse transfer capacitance f = 1 MHz 15 30 fF
F noise figure f = 800 MHz 1.1 1.8 dB
Xmod cross-modulation input level for k = 1 % at 100 104 dBV
40 dB AGC
Tj junction temperature 150 C
2003 Nov 14 2
NXP Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1212; BF1212R; BF1212WR
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
BF1212 plastic surface mounted package; 4 leads SOT143B
BF1212R plastic surface mounted package; reverse pinning; 4 leads SOT143R
BF1212WR plastic surface mounted package; reverse pinning; 4 leads SOT343R
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS drain-source voltage 6 V
ID drain current (DC) 30 mA
IG1 gate 1 current 10 mA
IG2 gate 2 current 10 mA
Ptot total power dissipation
BF1212; BF1212R Ts 116 C; note 1 180 mW
BF1212WR Ts 122 C; note 1 180 mW
Tstg storage temperature 65 +150 C
Tj junction temperature 150 C
Note
1. Ts is the temperature of the soldering point of the source lead.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
Rth j-s thermal resistance from junction to soldering point
BF1212; BF1212R 185 K/W
BF1212WR 155 K/W
2003 Nov 14 3
NXP Semiconductors Product specification
N-channel dual-gate MOS-FETs BF1212; BF1212R; BF1212WR
MDB828
250
handbook, halfpage
Ptot
(mW)
200
150 (2) (1)
100
50
0
0 50 100 150 200
Ts (