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Philips Semiconductors Product Specification

PowerMOS transistor BUK543-100A/B
Logic level FET

GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. MAX. UNIT
logic level field-effect power
transistor in a plastic full-pack BUK543 -100A -100B
envelope. VDS Drain-source voltage 100 100 V
The device is intended for use in ID Drain current (DC) 8.3 7.5 A
Switched Mode Power Supplies Ptot Total power dissipation 25 25 W
(SMPS), motor control, welding, RDS(ON) Drain-source on-state 0.18 0.22
DC/DC and AC/DC converters, and resistance; VGS = 5 V
in automotive and general purpose
switching applications.

PINNING - SOT186 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION d
case
1 gate
2 drain
g
3 source

case isolated
1 2 3 s

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS Drain-source voltage - - 100 V
VDGR Drain-gate voltage RGS = 20 k - 100 V