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MCi4022B
Octal Counter
The MC14022B is a four-Stage Johnson octal counter with built-in code converter. High-Speed Operation and Spike-free Outputs are obtained by use of a Johnson octal counter design. The eight decoded Outputs are normally low, and go high only at their appropriate octal time period. The output changes occur on the positive-going edge of the clock pulse. This part tan be used in frequency division applications as well as octal counter or octal decode display applications.
l

L SUFFIX CERAMIC CASE 620

.
l

. . . .

Fully Static Operation DC Glock Input Circuit Allows Slow Rise Times Carry Out Output for Cascading Supply Voltage Range = 3.0 Vdt to 18 Vdt Capable of Driving Two Low-power lTL Loads or One Low-power Schottky lTL Load Over the Rated Temperature Range Pin-for-Pin Replacement for CD4022B Triple Diode Protection on All Inputs

P SUFFIX PIASTIC CASE 648

D SUFFIX SOIC CASE 751 B

MAXIMUM RATINGS* (Voltages Referenced to VSS) 1 Svmbol 1 Parameter I Value 1 Unit TA = - 55" to 125°C for all packages.

r Output Current (DC or Transient),

FUNCTIONAL TRUTH TABLE (Positive Loglc) Glock Glock E n a b l e Reset Output=n

Tstg

Storage Temperature Lead Temperature (6-Second Soldering)

-65to+150 260

"C "C

TL * Maximum Ratings are those values beyond which darnage to the device may occur. tTemperature Derating: Plastic "P and DIDW" Packages: - 7.0 mW/"C From 65°C To 125°C Ceramic "c' Packages: - 12 mW/"C From 100°C To 125°C LOGIC DIAGRAM

0 X X 1 / 0 -L X 1 -L X / X X X = Don't Care. If n < Otherwise = 0.

0 n 0 n 0 n+l 0 n 0 n+l 0 1 GI 4 Carry = 1,

BLOCK DIAGRAM

ARRY CLOCK ENABLE l3

RESET 15 VDO = PIN V66 = PIN 8 NC = PIN 6,9

REV 3 1194 @ Motorola, Inc. 1995

MOTOROLA

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

Characteristic Iutput Voltage Vi,,= vD,,OrO "0" Level

"1" Level

nput Voltage "0" Level (VC = 4.5 or 0.5 Vdt) (VC = 9.0 or 1 .O Vdt) (VC = 13.5 or 1.5 Vdt) "1" Level (VC = 0.5 or 4.5 Vdt) (VC = 1 .O or 9.0 Vdt) (VC = 1.5 or 13.5 Vdt) Putput Drive Current (VO,, = 2.5 Vdt) (VOH = 4.6 Vdt) (VO,, = 9.5 Vdt) (VO,, = 13.5 Vdt) (VCL = 0.4 Vdt) (`/CL = 0.5 Vdt) (VOL = 1.5 Vdt) nput Current nput Capacitance (Yn = 0) 3uiescent Current (Per Package) Total Supply Current'*t (Dynamit plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buflers switching) #Data labelled "Typ" is not to be used Ir design purposes but is intended as an indication of the Ic's potential perlormance. "The formulas given are for the typical characteristics only at 25°C. TTo calculate total supply current at loads other than 50 pF: lT(CL) = tT(50 pF) + (CL - 50) Vfk where: IT is in fl (per package), CL in pF, V = (VDD - VSS) in volts, f in kHz is input frequency, and k = 0.00125. Source

Sink

PIN ASSIGNMENT

NC = NO CONNECTION

MC1 40228 94

MOTOROLA CMOS LOGIC DATA

.

SWITCHING CHARACTERISTICS' KJ = 50 DF. Characteristic 3utput Rise and Fall Ime tT,J.,, tT,-,L = (1.5 n.s/pF) CL + 25 ns tTLH, tTf-fL = (0.75 ns/pF) CL + 12.5 ns tTLH, tT,,L = (0.55 ns/pF) CL + 9.5 IlS Propagation Delay Time

TA

= 25°C)

ns 100 50 40 200 100 80 ns 500 230 175 1000 460 350

Glock tP,Jf, tPLf+ tPL,,,

to C,,t tP,,L = (1.7 ns/pF) CL + 315 nS tPf-fL = (0.66 ns/pF) CL + 142 ns tP,-,L = (0.5 ns/pF) CL + 100 nS

Glock Pulse Width

Glock Enable Setup Time

* The formulas given are tor the typlcal cnaractenstlcs only at zs-L. #Data labelled `Typ" is not to be used for design purposes but is intended as an indication of the Ic's potential Performance.

MOTOROLA CMOS LOGIC DATA

MC1 40228 95

VDD Vout Output Sink Drive Output Source Drive Clock to desired Output (S1 to B) S1 to A ­ VDD Vout ­ VDD

VSS VDD S1 A

VSS

B

CLOCK Q0 ENABLE Q1 Q2 Q3 Q4 RESET Q5 Q6 Q7 CLOCK C out VSS

Outputs ID Carry VGS = EXTERNAL POWER SUPPLY VDS =

(S1 to A) Clock to Q5 thru Q7 (S1 to B) VDD Vout

Figure 1. Typical Output Source and Output Sink Characteristics Test Circuit
VDD 500 µF ID 0.01 µF CERAMIC

CLOCK ENABLE RESET PULSE GENERATOR fc

CLOCK

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Cout

VSS

CL

CL

CL

CL

CL

CL

CL

CL

CL

Figure 2. Typical Power Dissipation Test Circuit

APPLICATIONS INFORMATION
Figure 3 shows a technique for extending the number of decoded output states for the MC14022B. Decoded outputs are sequential within each stage and from stage to stage, with no dead time (except propagation delay).

C

R

C

R

C

R

CE MC14022B Q0 Q1 · · · Q6 Q7

CE MC14022B Q0 Q1 · · · Q6 Q7

CE MC14022B Q1 · · · Q6 Q7 6 DECODED OUTPUTS

7 DECODED OUTPUTS

6 DECODED OUTPUTS

CLOCK FIRST STAGE INTERMEDIATE STAGES LAST STAGE

Figure 3. Counter Expansion

MC14022B 96

MOTOROLA CMOS LOGIC DATA

tWH CLOCK

tWL trel tsu 20 ns

90% 20 ns 20 ns

V 50% DD VSS 10% VDD VSS VDD VSS

CLOCK ENABLE RESET trem

20 ns

20 ns

Q0

tPHL tPLH tPHL

tPLH 50%

tPLH tTHL

VOH VOL VOH VOL VOH VOL VOH

90% Q1 tPLH tPHL tTLH

50% 10%

Q2

tPLH

tPHL

tTLH

Q3 tPLH Q4 tPLH tPHL tPHL tTLH

VOL VOH VOL tPHL VOH VOL tTHL VOH VOL VOH VOL VOH VOL tTHL

tTLH

Q5

tTLH

tPLH tPLH

tTHL

tPHL

tTLH

Q6 tPHL tTLH tPHL tTLH tTHL tPLH

Q7 Cout tPHL

Figure 4. AC Measurement Definition and Functional Waveforms

MOTOROLA CMOS LOGIC DATA

MC14022B 97

OUTLINE DIMENSIONS
L SUFFIX CERAMIC DIP PACKAGE CASE 620­10 ISSUE V
­A­
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. DIM A B C D E F G H K L M N INCHES MIN MAX 0.750 0.785 0.240 0.295 ­­­ 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 ­­­ 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01

­B­
1 8

C

L

­T­
SEATING PLANE

N E F D G
16 PL

K M J
16 PL

0.25 (0.010)
M

M

T B

S

0.25 (0.010)

T A

S

P SUFFIX PLASTIC DIP PACKAGE CASE 648­08 ISSUE R
­A­
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01

B
1 8

F S

C

L

­T­ H G D
16 PL

SEATING PLANE

K

J T A
M

M

0.25 (0.010)

M

MC14022B 98

MOTOROLA CMOS LOGIC DATA

OUTLINE DIMENSIONS
D SUFFIX PLASTIC SOIC PACKAGE CASE 751B­05 ISSUE J
­A­
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019

16

9

­B­
1 8

P

8 PL

0.25 (0.010)

M

B

S

G F

K C ­T­
SEATING PLANE

R

X 45 _

M D
16 PL M

J

0.25 (0.010)

T B

S

A

S

DIM A B C D F G J K M P R

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1­800­441­2447 or 602­303­5454 MFAX: [email protected] ­ TOUCHTONE 602­244­6609 INTERNET: http://Design­NET.com

JAPAN: Nippon Motorola Ltd.; Tatsumi­SPD­JLDC, 6F Seibu­Butsuryu­Center, 3­14­2 Tatsumi Koto­Ku, Tokyo 135, Japan. 03­81­3521­8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852­26629298

MOTOROLA CMOS LOGIC DATA

*MC14022B/D*

MC14022B MC14022B/D 99