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HCC/HCF4026B HCC/HCF4033B
DECADE COUNTERS/DIVIDERS WITH DECODED 7-SEGMENT DISPLAY OUTPUTS
. . . . . . . . . . . .
WITH; DISPLAY ENABLE 4026B RIPPLE BLANKING 4033B COUNTER AND 7-SEGMENT DECODING IN ONE PACKAGE EASILY INTERFACED WITH 7-SEGMENT DISPLAY TYPES FULLY STATIC COUNTER OPERATION : DC TO 6MHz (typ.) AT VDD = 10V IDEAL FOR LOW-POWER DISPLAYS DISPLAY ENABLE OUTPUT - 4026B "RIPPLE BLANKING" AND LAMP TEST - 4033B QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V, AND 15V PARAMETRIC RATING INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD N° 13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIES CMOS DEVICES"
EY (Plastic Package)
F (Ceramic Frit Seal Package)
M1 (Micro Package)
C1 (Plastic Chip Carrier)
ORDER CODES : HCC40XXBF HCF40XXBM1 HCF40XXBEY HCF40XXBC1
PIN CONNECTIONS
DESCRIPTION The HCC4026B/4033B (extended temperature range) and HCF4026B/4033B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4026B and HCC/HCF4033B each consist of a 5-stage Johnson decade counter and an output decoder which converts the Johnson code to a 7-segment decoded output for driving one stage in a numerical display. These devices are particularly advantageous in display applications where low power dissipation and/or low package count are important. Inputs common to both types are CLOCK, RESET, & CLOCK INHIBIT ; common outputs are CARRY OUT and the seven decoded outputs (a, b, c, d, e, f, g). Additional inputs and outputs for the HCC/HCF4026B include DISPLAY ENABLE input and DISPLAY ENABLE and UNGATED "CSEGMENT" outputs. Signals peculiar to the HCC/HCF4033B are RIPPLE-BLANKING INPUT AND LAMP TEST INPUT and a RIPPLE-BLANKING OUTPUT. A high RESET signal clears the deJune 1989
4026B
4033B
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HCC/HCF4026B/4033B
cade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (Cout) signal completes one cycle every ten CLOCK INPUT cycles and is used to clock the succeeding decade directly in a multi-decade counting chain. The seven decoded outputs (a, b, c, d, e, f, g) illuminate the proper segments in a seven segment display device used for representing the decimal numbers 0 to 9. The 7-segment outputs go high on selection in the HCC/HCF4033B ; in the HCC/HCF4026B these outputs go high only when the DISPLAY ENABLE IN is high. HCC/HCF4026B - When the DISPLAY ENABLE IN is low the seven decoded outputs are forced low regardless of the state of the counter. Activation of the display only when required results in significant power savings. This system also facilitates implementation of display-character multiplexing. The CARRY OUT and UNGATED "C-SEGMENT" signals are not gated by the DISPLAY ENABLE and therefore are available continuously. This feature is a requirement in implementation of certain divider functions such as divide-by-60 and divide-by-12. HCC/HCF4033B - The HCC/HCF4033B has provisions for automatic blanking of the non-significant zeros in a multi-digit decimal number which results in an easily readable display consistent with normal writing practice. For example, the number 0050.07000 in an eight digit display would be displayed as 50.07. Zero suppression on the integer side is obtained by connecting the RBI terminal of the HCC/HCF4033B associated with the most significant digit in the display to a low-level voltage and connecting the RBO terminal of that stage to the RBI terminal of the HCC/HCF4033B in the next-lower significant position in the display. This procedure is continued for each succeeding HCC/HCF4033B on the integer side of the display. On the fraction side of the display the RBI of the HCC/HCF4033B associated with the least significant bit is connected to a low-level voltage and the RBO of that HCC/HCF4033B is connected to the RBI terminal of the HCC/HCF4033B in the next more-significant-bit position. Again, this procedure is continued for all HCC/HCF4033B's on the fraction side of the display. In a purely fractional number the zero immediately preceding the decimal point can be displayed by connecting the RBI of that stage to a high level voltage (instead of to the RBO of the next more-significant-stage). For example : optional zero 0.7346. Likewise, the zero in a number such as 763.0 can be displayed by connecting the RBI of the HCC/HCF4033B associated with it to a high-level voltage. Ripple blanking of non-significant zeros provides an appreciable savings in display power. The HCC/HCF4033B has a LAMP TEST input which, when connected to a high-level voltage, overrides normal decoder operation and enables a check to be made on possible display malfunctions by putting the seven outputs in the high state.
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HCC/HCF4026B/4033B
FUNCTIONAL DIAGRAMS
4026B 4033B
ABSOLUTE MAXIMUM RATINGS
Symbol V DD * Vi II P tot Parameter Supply Voltage : HCC Types HCF Types Input Voltage DC Input Current (any one input) Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range Operating Temperature : HCC Types HCF Types Storasge Temperature Value 0.5 to + 20 0.5 to + 18 0.5 to V DD + 0.5 ± 10 200 100 55 to + 125 40 to + 85 65 to + 150 Unit V V V mA mW mW °C °C °C
T op T s tg
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. * All voltages values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol V DD VI Top Parameter Supply Voltage : HCC Types HC F Types Input Voltage Operating Temperature : HCC Types H CF Types Value 3 to 18 3 to 15 0 to V DD 55 to + 125 40 to + 85 Unit V V V °C °C
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HCC/HCF4026B/4033B
LOGIC DIAGRAMS
4026B
4033B
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HCC/HCF4026B/4033B
TIMING DIAGRAMS
4026B
4033B
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HCC/HCF4026B/4033B
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)
Test Conditions Symbol Parameter VI (V) 0/ 5 HCC 0/10 Types 0/15 0/20 0/ 5 HCF 0/10 Types 0/15 VOH Output High Voltage 0/ 5 0/10 0/15 VOL Output Low Voltage 5/0 10/0 15/0 VIH Input High Voltage 0.5/4.5 1/9 4.5/0.5 9/1 0/ 5 HCC Types 0/ 5 0/10 0/15 0/ 5 HCF Types 0/ 5 0/10 0/15 IOL Output Sink Current 0/ 5 HCC Types 0/10 0/15 0/ 5 HCF Types IIH, IIL Input Leakage Current 0/10 0/15 HCC Types 0/18 HCF 0/15 Types Any Input 2.5 4.6 9.5 13.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 0.4 0.5 1.5 < 1 < 1 < 1 < 1 < 1 < 1 < 1 < 1 < 1 < 1 VO (V) | IO | (µA) V DD (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 5 10 15 5 10 15 5 10 15 18 Any Input 15 ± 0.3 ±10 5
5
Value T Lo w* Min. Max. Min. 5 10 20 100 20 40 80 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 2 0.64 1.6 4.2 1.53 0.52 1.3 3.6 0.64 1.6 4.2 0.52 1.3 3.6 ± 0.1 1.6 3.2 0. 51 1.3 3.4 0. 44 1.1 3.0 0.51 1.3 3.4 0.44 1.1 3.0 1 2.6 6.8 1 2.6 6.8 1 2.6 6.8 1 2.6 6.8 ±105 ± 0.1 ± 0.3 7.5 3.5 7 11 1.5 3 4 1.15 0.36 0. 9 2. 4 1. 1 0.36 0. 9 2. 4 0.36 0.9 2.4 0.36 0.9 2.4 ± 1 ± 1 pF µA mA mA 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 V V 25 °C 0.04 0.04 0.04 0.08 0.04 0.04 0.04 5 10 20 100 20 40 80 4.95 9.95 14.95 0.05 0.05 0.05 V V T High* Max. 150 300 600 3000 150 300 600 µA Unit Typ. Max. Min.
IL
Quiescent Current
1.5/13.5 < 1 VIL Input Low Voltage
13.5/1.5 < 1 IOH Output Drive Current
1. 36 3.2
CI
Input Capacitance
(*) TLow = 55°C for HCC device : 40°C for HCF device. THigh= + 125°C for HCC device : + 85°C for HCF device. The Noise Margin for both "1" and "0" level is : 1V min. with VDD = 5V, 2V min. with VDD = 10V, 2.5V min. with VDD = 15V.
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HCC/HCF4026B/4033B
DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25°C, C L = 50pF, R L = 200k, typical temperature coefficient for all V DD values is 0.3%/°C, all input rise and fall times = 20ns)
Symbol Parameter Test Conditions V D D (V) Min. 5 10 15 t P L H , t P HL Propagation Delay Time Decode Out Lines 5 10 15 t THL , t T L H Transition Time Carry Out Line 5 10 15 f CL * Maximum Clock Input Frequency 5 10 15 t WC Clock Pulse Width 5 10 15 t r, tf Clock Input Rise or Fall Time 5 10 15 5 10 15 t P L H , t P HL Propagation Delay Time Decode Out Lines 5 10 15 t WR Reset Pulse Width 5 10 15 trem Reset Removal Time 5 10 15
* Measured with respect to carry output line.
Value Typ. 250 100 75 350 125 90 100 50 25 2.5 5.5 8 5 11 16 110 50 40 Unlimited 270 100 80 Max. 500 200 150 700 250 180 200 100 50
Unit
CLOCKED OPERATION t P L H , t P HL Propagation Delay Time Carry Out Line ns
ns
ns
MHz
ns
µs
RESET OPERATION t PL H, Propagation Delay Time Carry Out Line 275 120 80 300 125 90 100 50 25 0 0 0 550 240 160 600 250 180 120 100 50 30 15 10 ns ns ns ns
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HCC/HCF4026B/4033B
Typical Output Low (sink) Current. Minimum Output Low (sink) Current Characteristics.
Typical Output High (source) Current Characteristics.
Minimum Output High (source) Current Characteristics.
TYPICAL APPLICATIONS Interfacing with Filament Fluorescent Display. Detail of Typical Flip-flop Stage for Both Types.
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HCC/HCF4026B/4033B
TYPICAL APPLICATIONS (continued) Interfacing with LED Displays (display common anode). (Display Common Cathode).
Interfacing with NIXIE Tube.
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HCC/HCF4026B/4033B
Interfacing with Liquid Cristal Displays.
TEST CIRCUITS Quiescent Device Current. Input Voltage.
Input Current.
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HCC/HCF4026B/4033B
Plastic DIP16 (0.25) MECHANICAL DATA
mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX.
DIM.
P001C
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HCC/HCF4026B/4033B
Ceramic DIP16/1 MECHANICAL DATA
mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276
DIM.
P053D
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HCC/HCF4026B/4033B
SO16 (Narrow) MECHANICAL DATA
DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
P013H
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HCC/HCF4026B/4033B
PLCC20 MECHANICAL DATA
mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180
DIM.
P027A
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HCC/HCF4026B/4033B
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
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0
$
CKDISENslOf g A EN EN OUT OUT p SegmentAusghge
01 Y/
SEGMENTANORDNUNG
Beschreibung: Dieser synchrone dekadische Zähler oder Teiler durch 10. lieferf interne Decodierung zur Steuerung einer 7-Segment-Anzeige. Er besitzt weder einen internen Speicher für die Zählung, noch liefert er genügend Ausgangsstrom, um Anzeigen mit hliherem Strom direkt zu treiben. Betrieb: Bei normalem Betrieb werden Reset und Glock-Enable (Takt-Freigabe) an Masse und der Anschluß Display-Enable (Anzeige-Freigabe) auf High gelegt. Der Zähler schreitet um eine Zählung bei jedem Ubergang Masse-auf-positiv (positive Flanke) des Takt-Eingangs (Glock) fort. Es gibt zwei Arten von Ausgängen. Beim Ausgang t IO ergibt sich eine Rechteckspannung, die füi die Zahlen 0 bis 4 High ist und für die Zahlen 5 bis 9 Lew ist. Bei den Ausgängen a bis g wird ein High-Zustand erzeugt. Wenn ein Anzeige-Segment einzuschalten ist, wird der entsprechende Ausgang (a-f) High gemacht. Beachten Sie, daß der Ausgang "6" das Segment a und der Ausgang "9" das Segment d beinhaltet. Der Anschluß "2 OUT" geht nur bei Zählung 2 auf Lew. Fluoreszenz-Anzeigen und neuere LED-Anzeigen können direkt von den Ausgängen betrieben werden. Licht-emittierende Dioden mit hohem Strom und Neon-Anzeigen benötigen externe Treiber. Flüssigkristall-Anzeigen benötigen eine externe WechselspannungsSteuerung. Der Zähler wird auf Null zurückgesetzt, indem der Reset Anschluß kurzzeitig auf High gebracht wird. Ein High an CL EN sperrt den Takt-Betrieb. Ein Low an DIS EN schaltet die Anzeige ab. Dies kann zum Sparen von Leistung für die Anzeige verwendet werden, oder um eine Helligkeits-steuerung über eine Impulsbreiten-Modulation zu erreichen. Ein etwas verzögertes EN OUT folgt auch dem DIS EN-Eingang. Anwendung: Dekadisches Zählen oder Teilen, mit 7-Segment-Anzeige. Daten: Maximale Zählfrequenz Stromaufnahme bei 1 MHz (mit unbelasteten Ausgängen) Maximaler Ausgangsstrom 5v 2.5 0.4 1.2 1ov 5 0.8 5 MHz mA mA
Hersteller: RCA, SGS, SOL SSS
Dezimalzähler (+ 10) mit decodiertem 7-Segment-Ausgang (synchron)
4026