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HCF4098B
DUAL MONOSTABLE MULTIVIBRATOR
s

s

s

s s s s

s s

s s

RETRIGGERABLE/RESETTABLE CAPABILITY TRIGGER AND RESET PROPAGATION DELAYS INDEPENDENT OF RX, CX TRIGGERING FROM LEADING OR TRAILING EDGE Q AND Q BUFFERED OUTPUT AVAILABLE SEPARATE RESETS WIDE RANGE OF OUTPUT PULSE WIDTHS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"

DIP

SOP

ORDER CODES
PACKAGE DIP SOP TUBE HCF4098BEY HCF4098BM1 T&R HCF4098M013TR

DESCRIPTION The HCF4098B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4098B dual precision monostable multivibrator provides stable retriggerable/ resettable one-shot operation for any fixed voltage timing application. An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and C X provides a PIN CONNECTION

wide range of output pulse widths from the Q and Q terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX. Leading edge triggering (+TR) and trailing edge triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD . A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on.

September 2001

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An unused RESET input should be tied to VDD . However, if an entire section of the HCF4098B is not used, its reset should be tied to VSS (see table 1). In normal operation the circuit triggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retiggerable mode, Q is connected to -TR when leading edge triggering (+TR) is used or Q is connected to +TR when trailing edge triggering (-TR) is used. The time period (T) for this IINPUT EQUIVALENT CIRCUIT multivibrator can be calculated by : T = 1/2 RX CX for CX > 0.01µF. The min. value of external resistance, RX, is 5K. The max. values of external capacitance, CX, is 100 µF. The output pulse width has variations of ±2.5% typically, over the temperature range of -55 °C to 125 °C for CX=1000pF and R X = 100K . For power supply variation of ±5% typically , for V DD = 10V and 15V and ±1% typically for VDD = 5V at CX = 1000pF and RX = 5K . PIN DESCRIPTION
PIN No 4, 12 5, 11 3, 13 1, 15 2, 14 6, 7 10, 9 8 16 SYMBOL +TR -TR RESET CX1, CX2 RXCX1 RXCX2 Q1, Q1 Q2, Q2 VSS VDD NAME AND FUNCTION Leading Trigger Inputs Trailing Trigger Inputs Reset Inputs External Capacitors External resistors to Vdd Ouputs Mono 1 Outputs Mono 2 Negative Supply Voltage Positive Supply Voltage

FUNCTIONAL DIAGRAM

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TABLE 1 : Functional Terminal Connections
VDD to Term. N° VSS to Term. N° Input Pulse to Term. N° Other Connections

FUNCTION Leading Edge Trigger/ Retriggerable Leading Edge Trigger/Non Retriggerable Trailing Edge Trigger/ Retriggerable Trailing Edge Trigger/Non Retriggerable Unused Section

Mono (1) Mono (2) Mono (1) Mono (2) Mono (1) Mono (2) Mono (1) Mono (2) 3, 5 3 3 3 5 11, 13 13 13 13 11 3, 4 12, 13 4 12 4 4 5 5 12 12 11 11 4, 6 12, 10 5, 7 11, 9

A Retriggerable one-shot multivibrator has an output pulse width which is extended on full time period (T) after application of the last trigger pulse. A Non-Retriggerable one-shot multivibrator has a time period (T) referenced from the application of the firs trigger pulse.

LOGIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS
Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 ± 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW °C °C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage.

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RECOMMENDED OPERATING CONDITIONS
Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V °C

DC SPECIFICATIONS
Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) |IO| VDD (µA) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 TA = 25°C Min. Typ. 0.02 0.02 0.02 0.04 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 -1.6 -0.51 -1.3 -3.4 -0.51 -1.3 -3.4 -3.2 -1 -2.6 -6.8 1 2.6 6.8 ±10-5 5 ±0.1 7.5 -1.3 -0.42 -1.1 -2.8 -0.42 -1.1 -2.8 ±1 3.5 7 11 1.5 3 4 -1.3 -0.42 -1.1 -2.8 -0.42 -1.1 -2.8 ±1 Max. 1 2 4 20 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 Value -40 to 85°C Min. Max. 30 60 120 600 4.95 9.95 14.95 0.05 0.05 0.05 -55 to 125°C Min. Max. 30 60 120 600 Unit

IL

Quiescent Current

µA

VOH

High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current

VOL

VIH

VIL

IOH

IOL

Output Sink Current Input Leakage Current Input Capacitance

0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/18

<1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1

V

V

V

V

mA

mA µA pF

II CI

Any Input Any Input

The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V

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DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200K, tr = tf = 20 ns)
Test Condition Symbol Parameter RX (K) 5 to 10000 CX (pF) >15 VDD (V) 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 Min. Value (*) Typ. 250 125 100 70 30 20 100 50 40 100 50 40 150 75 65 250 150 80 225 125 75 100 40 30 600 300 250 250 15 10 5 7.5 7.5 Max. 500 250 200 ns Unit

tPLH tPHL Propagation Delay Time +TR or -TR to Q or Q tWH tWL Trigger Pulse Width

5 to 10000 tTLH Transition Time 5 to 10000 tTHL Transition Time 5 to 10000

>15

140 60 40

ns 200 100 80 200 100 80 300 150 130 500 300 160 450 250 150

>15

ns

15 to 10000

5 to 10000

0.01µF to 0.1µF 0.1µF to 1µF

ns

5 to 10000 tPLH tPHL Propagation Delay Time (Reset) tWR Pulse Width (reset)

5 to 10000

>15

ns

15

100

1000

0.1µF tr, tf (TR) Rise or Fall Time (trigger) Pulse Width Match Between Circuits in Same Package 10 5 to 15 10000

200 80 60 1200 600 500 50 30 20

ns

µs 100 10 15 15 µs %

(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.

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TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200K RT = ZOUT of pulse generator (typically 50)

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Plastic DIP-16 (0.25) MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch

P001C
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SO-16 MECHANICAL DATA
DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010

PO13H
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com

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