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HCF4502B
STROBED HEX INVERTER/BUFFER
s s s s s
s s
s s
2 TTL-LOAD OUTPUT DRIVE CAPABILITY 3 STATE OUTPUTS COMMON OUTPUT DISABLE CONTROL INHIBIT CONTROL QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"
DIP
SOP
ORDER CODES
PACKAGE DIP SOP TUBE HCF4502BEY HCF4502BM1 T&R HCF4502M013TR
DESCRIPTION HCF4502B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. It consists of six inverter/buffers with 3 state outputs. A logic "1" on the OUTPUT DISABLE input produces a High Impedance State in all six outputs. This feature permits common busing of
the outputs, thus simplifying system design. A logic "1" on the INHIBIT input switches all six outputs to logic "0" if the OUTPUT DISABLE input is a logic "0". This device is capable of driving two standard TTL loads, which is equivalent to six times the JEDEC "B" series IOL standard .
PIN CONNECTION
September 2002
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INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 3, 6, 1, 10, 13, 15 5, 7, 2, 9, 11, 14 4 12 8 16 SYMBOL D1 to D6 Q1 to Q6 OUTPUT DISABLE INHIBIT VSS VDD NAME AND FUNCTION Data Inputs Data Outputs 3-State Output Disable Input Inhibit Input Negative Supply Voltage Positive Supply Voltage
TRUTH TABLE
DISABLE L L L H
X : Don't Care Z : High Impedance
INHIBIT L L H X
Dn L H X X
Qn H L L Z
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 ± 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW °C °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V °C
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DC SPECIFICATIONS
Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) |IO| VDD (µA) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 18 TA = 25°C Min. Typ. 0.02 0.02 0.02 0.04 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 -1.36 -0.44 -1.1 -3.0 2.6 6.63 17.3 -3.2 -1 -2.6 -6.8 6 15.6 40.8 ±10-5 ±10-4 5 -1.15 -0.36 -0.9 -2.4 2.1 5.4 14.2 3.5 7 11 1.5 3 4 -1.15 -0.36 -0.9 -2.4 2.1 5.4 14.2 Max. 1 2 4 20 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 Value -40 to 85°C Min. Max. 30 60 120 600 4.95 9.95 14.95 0.05 0.05 0.05 -55 to 125°C Min. Max. 30 60 120 600 Unit
IL
Quiescent Current
µA
VOH
High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current
VOL
VIH
VIL
IOH
IOL
Output Sink Current Input Leakage Current 3-State Output Input Capacitance
0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/18 0/18
<1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1
V
V
V
V
mA
mA
II
Any Input Any Input Any Input
±0.1 ±0.4
7.5
±1 ±12
±1 ±12
µA µA
pF
IOZ CI
The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
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DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200K, tr = tf = 20 ns)
Test Condition Symbol tPHL Parameter Propagation Delay Time (Data or Inhibit) Propagation Delay Time (Data or Inhibit) Disable Delay Time (Output High to High Impedance) Disable Delay Time (High Impedance to Output High) Disable Delay Time (Output Low to High Impedance) Disable Delay Time (High Impedance to Output Low) Transition Time VDD (V) 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 Min. Value (*) Typ. 135 60 40 190 90 65 60 40 30 110 50 40 125 65 55 125 55 40 100 50 40 60 30 20 Max. 270 120 80 380 180 30 120 80 60 220 100 80 250 130 110 250 110 80 200 100 80 120 60 40 ns Unit
tPLH
ns
tPHZ
ns
tPZH
ns
tPLZ
ns
tPZL
ns
tTLH
ns
tTHL
Transition Time
ns
(*) Typical temperature coefficent for all VDD value is 0.3 %/°C.
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HCF4502B
TEST CIRCUIT
TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ
CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200K RT = ZOUT of pulse generator (typically 50)
SWITCH Open VDD VSS
WAVEFORM 1: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
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WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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Plastic DIP-16 (0.25) MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch
P001C
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SO-16 MECHANICAL DATA
DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 ° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
PO13H
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