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MSI
Quadruple 2-input multiplexer
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
· The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC · The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4519B MSI Quadruple 2-input multiplexer
Product specification File under Integrated Circuits, IC04 January 1995
Philips Semiconductors
Product specification
Quadruple 2-input multiplexer
DESCRIPTION The HEF4519B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources. The `A' inputs are selected when SA is HIGH, the `B' inputs when SB is HIGH. When SA and SB are HIGH, the output (On) is the logical EXCLUSIVE-NOR of the An and Bn inputs (On = An Bn).
HEF4519B MSI
When SA and SB are LOW, the output (On) is LOW, independent of the multiplexer inputs (An and Bn). The HEF4519B cannot be used to multiplex analogue signals. The outputs utilize standard buffers for best performance.
Fig.1 Functional diagram.
PINNING SA, SB A0 to A3 Bo to B3 O0 to O3 selects inputs (active HIGH) multiplexer inputs multiplexer inputs multiplexer outputs
FAMILY DATA, IDD LIMITS category MSI Fig.2 Pinning diagram. See Family Specifications
HEF4519BP(N): HEF4519BD(F): HEF4519BT(D):
16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
January 1995
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Philips Semiconductors
Product specification
Quadruple 2-input multiplexer
HEF4519B MSI
Fig.3 Logic diagram.
FUNCTION TABLE INPUTS SA L H L H H H H Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial SB L L H H H H H An X An X L H L H Bn X X Bn L L H H OUTPUT On L An Bn H L L H
January 1995
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Philips Semiconductors
Product specification
Quadruple 2-input multiplexer
AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays An , Bn On HIGH to LOW 5 10 15 5 LOW to HIGH SA, SB On HIGH to LOW 10 15 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPLH tPHL tPLH tPHL 95 40 30 80 40 30 95 40 30 85 40 30 60 30 20 60 30 20 190 80 60 160 80 60 190 80 55 165 80 60 120 60 40 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL TYP. MAX.
HEF4519B MSI
TYPICAL EXTRAPOLATION FORMULA 68 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 53 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 68 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 58 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL
VDD V Dynamic power dissipation per package (P) 5 10 15
TYPICAL FORMULA FOR P (µW) 1000 fi + (foCL) × VDD2 6000 fi + (foCL) × VDD 17 000 fi + (foCL) × VDD
2 2
where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) (foCL) = sum of outputs VDD = supply voltage (V)
APPLICATION INFORMATION Some examples of applications for the HEF4519B are: · 2-input multiplexers. · True/complement selectors.
January 1995
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