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RX MID CHANNELS 850: CH190 -- 881,6 GSM: CH 62 -- 947,4 MHz EGSM: CH 37 -- 942,4Mhz DCS: CH 700 -- 1842,8MHz PCS: CH 661 -- 1960MHz
TRK_OSC_OUT ( 26MHz for Digital IF Filter syncronisation) 35 19 20 22 23 16 17 High Band 1800 MHz Low Band 850 MHz 13 14
NEPTUNE LTS
U800
Tracking Control
100kHz
U150
LNA
ALGAE
AGC RF Det.
L&H Band
B5 27 BB Out 28 26 29 BB Out 30 CM IN BB I BB IX (decoupling analog GND) BB Q BB QX RF REG 47 RX Loop Filter RX_CP RF_5V_REG SYNTH_FD_P SYNTH_FB_N TX_CP 44 TX Loop Filter TX_MOD 26 MHz 3 A8 B8
Tracking Osc.
N
DSP Peripherals accelerator, encryption Timer, Interupts DMA Direct Memory Access Controller
POWER
M17 A11 E2 K2 K3 J4 L1 R1 VSIM SIM DIO SIM RST
VBUCK (VCC + 1,875V) (VCC + 2.775V) IO_REG VCC_OUT (VCC + 1,8V)
LNA
JSIM
6 2 1
(from PCAP )
LNA
LP Filter
AGC RF Det.
PMA
AAF
(Post Mixer Amplifier) LNA
IF Amp.
100kHz
2 Pole Filter
Dual ADC C9 Analog / Digital A9 Converter B9 D9 D5 C4 B6 A6 D4 TX CP HP-Filter RX Charge Pump
Digital Channal Filters Digital If Mixer and LO
DSP UltraLite 104 MHz
DSP Memory
SIM
Interface
SIM CLK SIM PD
SIM Connector 1.8 or 3V 4 SIM Card 3,5
GND VSIM
High Band 1900 MHz
Low Band 900 MHz
n
3.6 - 3.9 GHz 5
RX VCO RX EN 9 3.4 - 3.7 GHz 1710 - 1785 MHz 2 880 - 915 MHz 4 EXC EN 36 Super Filter Generator 2,45V 7, 8, 10, 11, 15, 18, 21, 37, 43, 48 TXIN_LB TXIN_HB SPI TX VCO 4
Synthesizer Phase Detect Prescaler
Shared Memory 1Mbit RAM
DATA BUS D0-15 ADDRESS BUS A1-24
VBUCK E4,B6... MCU Memory
42 Synth F/B 720 - 915 MHz 41
D8 XTAL A4
GMSK Mod & Mod DAC (TX) Clock Generator
MCU ARM7 52 MHz
External Memory
U700
Interface
39
38
32 33 31 34
Y805
RF_CS RF_DATA RF_CLK
1 3
26 MHz EXTAL B4 Oscillator U8, V7, W9 A10 D12 B10 T6 U6 W7 N9
G17 K16 W18 V17 J19 T16 T19 L16 N18 P2 N3 M4 P1 L3... D14 E1 C14 C18 M1 C13 U12 V6 T7 T13 W8 V14 U10 B17 G11 G10 A14
PA_REF
NEP_IO_REG
(VCC)
PA_DET LOWB_HIGH TX_EN EUROB_US EXC_EN
PA Control (PAC)
MQSPI
Display
Quard Saw Filter and Matching 14 15 12 13 8 9 10 11
High Band 1900MHz High Band 1800MHz Low Band
900MHz
FL100
R81
1 3 6 4 Match
R80
Match
(VCC)
L1 Timer SPI
GPIO
EXC_EN
(to Algae)
TX VCO FRQ. RANGE 850: 824 - 850Mhz GSM : 890 - 915 MHz EGSM: 880 - 915MHz DCS: 1710 - 1785MHz PCS: 1850 - 1910MHz
TX VCO MID CHANNELS 850: CH 190 - 836,6 GSM: CH 62 - 902,4MHz EGSM: CH 37 - 897,4Mhz DCS: CH 700 - 1747,8MHz PCS: CH 661 - 1880 MHz
BP BP
Low Band 850MHz
Internal Antenna A1
(to U800)
UART / USB Interface 4 6
Keypad Interface
MQSPI
25 23 27 29
32
12 33 11 34
10
E3.... A17 C15 D15 V12 W12 D18 B16 C16 A16 G3.... W13 T11 V11 B14 T10
UART2 One BaseBand Timer Wire Serial Audio Universal Interface Bus Port Interface Asynchron. BT (rx) (tx) Rx /Tx B15 A12 B13 N13 D16 V13 U13 D19 N17 V16 G8 W5 E3 W11 D13 B12 BLUE_HOST_WAKEB STANDBY_1_5V
(framesync)
F3 EB1_B (from Neptune) EB0_B C2 RESET OUT K1 FLASH F4 CS0B CS1B D6 R WB F5,D5 OEB J2,H1,H8 D4 BURSTCLK C6 E5 LBAB B5 ECBB G7 4MB Ram LCD_RS 32 MB Flash LCD_CS VBUCK LCD_CLK LCD_SDATA (LCD Control ) LCD DATA (0 - 5) EL_EN ( to EL Backlight Circuit) (from / to Keyboard Connector) ADC_DATA (from Light Sensor ) HS INT (Open / Close Detect) LT_SNS_CTL ( Light Sensor Control) VSIM_EN (to Pcap) (to PCap / Charger) MIDRATE_CTRL ( to Charger) ANT_DET_B (from Frontend) (from / to RF Circuit) RX_EN ( to U150) SWBP_EN (to Switch BP Circuit) USB_EN (to U906) PPD_DETB (from U911) SNP_INTB (from U910) SNP_INT_CTL (to Q957) (from / to EMU Bus) CHRG_DET_PU (to Q956) MUX1 (to U1400) MUX2 (toU1400) FACT_DET (toD7614)
ANT_DET_B
USB_VPIN USB_XRXD_RTS USB_VPOUT_TXD USB_VMIN_RXD USB_TXENB USB_SE0
CLK 13 MHz
RESETB OUT
(clock)
U50 J40
21
(Watchdog) WDOG
(to U700) RESET
17 8,16
LOWB_HIGH TX_EN
LP Low Band LP 3 2 1
(13 MHz)
Neptune PCap USB/ RS232 Communication
Neptune PCap Neptune Camera Communication
U801
Buffer CLK 32KHZ STANDBY
(from/ to U301 BT, (from/ to Neptune Serial Audio for Ringtone Neptune - BT - Neptune and Voice Audio) Communication and Wakeup)
Switch Control Circuit
19 18 14 15 13 Matching and Combiner Network Power Detector VCC PACII IC
EUROB_US EXC_EN PA_REF PA_DET RF_REG
(VCC)
U804
Buffer RESET_OUT_2_7V
(to Keyboard Connector0)
(from PCap)
(to U900)
RXD2 TXD2 RTS2 CTS2
High Band
CMOS PA Bias Circuit
KBC0-1 KBR0-7
2
(from PCap)
Mechanical Antenna Switch
AOC_DRIVE
BB SAP CLK BB SAP FS BB SAP RX BB SAP TX
3
2
1
BLUE_WAKEB
Antenna Switch
BB_SPI_CLK BB_SPI_MOSI BB_SPI_MISO PCAP_CS PCAP_INT BB_SPI_CS6 GA_INT
One Wire data from Battery
EAGLE
RF_REG
OWB
GSM SERVICE SUPPORT GROUP
2004.08.31 Rev. 1.2
V3
LEVEL 3 AL Block Diagram
Revision Overview Rev. 1.0: Initial Block Diagram Rev.1.1: updated page 3 Table
V3 Michael Hansen, Alexander Buehler Page 1of 3
KEYBOARD CONNECTOR J_KEYBRD
IO REG RESET_OUT_2_7V BB_SPI_MISO BB_SPI_MOSI BB_SPI_CLK BB_SPI_CS6 HS_INT GA INT LCD_SDATA LCD_RS LCD_DATA3 LCD_DATA5 LCD_CS LCD_DAT2 LCD_CLK LCD_DATA1 LCD_DATA0 LCD_DATA4 KBR5 KBR4 KBR3 KBR5 KBR7 KBC0 KBR2 KBR1 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 GND BP RTC_BATT ATI_CAM_IO GND EL_EN (from/ to PCap) EL_SUPPLY GND GND HAND_SPKRM HAND_SPKRP GND CLK_32KHZ_2_7V (from PCap 1,3V from Vibrator Regulator) GND VBUCK (from/ to PCap) IO REG GND LT_SNS_CTL (from Neptune) GND ADC_DATA (to Neptune - Lightsensor Status) BT_STAT (from PCap - drivesBlueTooth Status LED) PWR_SW (from PCap) KBC1 KBR0 (from/ to Neptune) KBC2
KEYPAD MATRIX
0-9,*,#, Up, Down Left-Right, Center, Soft L+R, Menu, Send, Volume U-D Smart, VA
(from/ to Neptune)
HS_INT
U1401
INVERTER
Antenna
BT_FEED
Power/ Send-End Main and CLI Display VGA Camera EL Backlight RTC Coincell BT Status LED LoudSpeaker
FL301
(from Neptune)
Bluetooth
TXD2 RXD2
(from/ to U301 BT, Neptune - BT - Neptune Communication and Wakeup)
CTS2 RTS2 BLUE_WAKEB BLUE_HOST_WAKEB RESETB CLK 32KHZ
4 41 37 39 11 9 29 12
U300
33
10 21 24,26,28 10 16 15 35 36 38 40
ANTENNA IO_REG BTRF_REG VCC_PA IO_REG
Y301
G1-G4
(GND)
D800
BT Crystal 26 MHz
(from Neptune/ PCap) (from PCap)
(from/ to Neptune Serial Audio for Ringtone and Voice Audio)
BB_SAP_RX BB_SAP_FS (framesync) BB_SAP_CLK(clock) BB_SAP_TX
Neptune PCap USB/ RS232 Communication
USB_VPIN USB_XRXD_RTS USB_VPOUT_TXD USB_VMIN_RXD USB_TXENB USB_SE0
Neptune PCap Communication
BB-SPI_CLK BB_SPI_MOSI BB_SPI_MISO PCAP CS PCAP INT
BB_SAP_CLK
BB_SAP_RX BB_SAP_TX
BB_SAP_FS
PWR SW
L/H/H
IO_REG USB_PWR
NC
NC NC
H8
H7
M8 P8 R7 K9 L10
F5
G7 C6 C5 G8 E5 F7
STEREO DET.
J41
4 1
MIC_BIAS1 INT_MICP
J2 H2
(tx) (rx) CODEC 13 BIT PHONE AUDIO AMPL.
(tx) (rx) CODEC 16 BIT STEREO
IO
USB/RS232
Neptune PCap
(communication)
PRI SPI CNTL. LOGIC
Neptune PCap Communication
SEC SPI CNTL. LOGIC
POWER FAIL DET.
ON LOGIC
HAND SPKRM
(to J_KEYBRD)
HAND SPKRP ALERTALERT+
J4 K2 F1 H1 K3 L2 K7 B3 B4 A5 NC NC NC NC
R6 T16 AD R17 CONV. T15 A/D U5 M13 CHARGE K13 CONTR. R15 N8 IO N15 W21
AD6 (from EMU Bus) USB_PWR (External B+ Sense) BATT+ (Battery Sense) VBUS (Over Volt. Sense) THERM ISENSE SIM_PD (to Neptune) CHRGC THERMBIAS MAIN_FET MIDRATE2 OV GATE
(from Neptune)
R958
J12
Internal MIC
NC NC
NC
Battery Charger
(One Wire Bus to Neptune)
F6
(Bias)
BATT CONN. J_BATT
2 3 1 4
GND BATTP
(to PCap AD Converter)
NC NC NC NC NC NC
OW_B
Alert Speaker
(from/ to U1400)
Q958 S G G2 L / H/ L Q953-2 D2
L / H / H D958 D S2 L / H/ L D1 Q951 D2 S1 G1 G2 S2 Q250 G
H/H/H D S
Color definition only for this section ! Main Charge Path B+ support without Ext Charger B+ support with Ext Charger Full -Rate B+ support with Ext Charger Mid - Rate
HJACK_SPKR_L HJACK_SPKR_R AUDIO_IN
H / H/ H
BP (Key Source for PCap IC)
(from Q957 - EMU Interface) (from/ to U1200)
USB_VBUS DP_RXD_OUT DM_TXD_OUT
USB INTERF.
U900 PCAP3
Logic
OVER VOLT. N13 CNTL. LED J16 CNTL. J15 NC BACKl. K17 NC CONTR. T11 T10 U8
Y900
Battery to B+ Switch USB_PWR
D952
BT_STAT
(to Staus LED in Flip)
H / L/ H D Q952 G S D1 S1 Q953-1
C2
MIDRATE_CTL
H / L/ H
(from Neptune )
B1
CHRG_DET (from U216)
L/H/H U912
USB_PWR to BP Switch Only for Full Rate Charger Mode
H/L/H
RTC_BATT LCELL_BYP
(from Keyboard Connector)
TOUCH
SCREEN
INTERF. MEMORY U13 HOLD
L/H/L
C935
U10
(from Neptune)
OV GATE STANDBY WDOG TX_EN RESETB CLK 13 MHZ CLK_32KHZ
H/L/L G Q954
D S
R954 L/H/H L/H/H
TIMER
Switcher 3 Boost Mode Switcher 2 Buck Mode
NC F15 Buck Mode G16, U3..........
Switcher 1
V10 E10
V9
V8
V7 G17
V6 NC N19
V5 NC K20
V4 H15
V3 F17
V2
V1 H17
VIB DRIVE
B+ Sense
AUX4
AUX4
VSIM
to Vibra
M9 H12 P15 L12 C2 T7
(Overvoltage Protection) USB_PWR_IN to USB_PWR SWITCH OV_SENSE IO_REG
USB_PWR
(to PCap AD Converter and internal Charger)
USB_PWR_IN
M17
H14 B7
D10
C10
B10
VVIB L17
F10
Buffer
CLK_32KHZ_2_7V
A6
A7
U1
U902
(to Neptune and U301 BT)
CQ943 B E
CLK_32KHZ
(to Neptune )
VHOLD_EXT_EN
1 Q943 3 2
( 2,775V ) ATI_CAM_IO
Vibrator
( ????? ) EL_SUPPLY
( 1,575V ) REF_REG
VSIM_EN ) VSIM
( 5,0V ) RF_5V_REG
J_VIB
( 1,8V )BTRF_REG
( 2,775V )RF_REG
( 2,775V ) IO_REG
( 1,875V ) VBUCK
( 1,275 ) GA_VCC
( 2,775V ) VDDA
( 5,6V ) VBOOST
(not used) AUD_
BP
VCC_OUT
REG
BP
( 1,8/ 3V
VCC_PA
GSM SERVICE SUPPORT GROUP LEVEL 3 AL Block Diagram
Revision Overview Rev. 1.0: Initial Block Diagram Rev.1.1: updated page 3 Table
2004.08.31 Rev. 1.1
V3
V3 Michael Hansen, Alexander Buehler Page 2of 3
Pin Number 1 2 3 4 (ID) 5 Shield Signal Name USB_ID AD6 PPD_DETB SMP_INTB FACT_DET CHRG_DET MUX1 MUX2 CHRG_DET_PU USB_EN USB_PWR USB_VBUS SNP_INT_CTL
Normal USB Acc. VBUS DM_TXD DP_RXD Open (2,8V) GND GND
Factory Test & Flash VBUS DM_TXD DP_RXD 4,75-5,25 *1, 3,03,3V *2 GND GND
High Voltage Flash VBUS DM_TXD DP_RXD Open (2,8V) GND GND
Mono Accessory Phone PPD Level HJACK_SPKR_L AUDIO_IN 102 K OHm +/- 1% GND GND
Stereo Accessory Phone PPD Level HJACK_SPKR_L HJACK_SPKR_R 102 K OHm +/- 1% GND GND
Dumb PPD *3 Phone PPD Level DM_TXD DP_RXD 102 K OHm +/- 1% GND GND
Dumb Mid-Rate Charger (500mA) 5V Short to DP_RXD Short to DM_TXD 200 KOHm +/- 1% GND GND
Dumb Fast Charger (1,25A) 5V Short to DP_RXD Short to DM_TXD 440 KOHm +/- 1% GND GND
Battery Powered VBUS DM_TXD DP_RXD 440 KOHm +/- 1% (Powers on the phone) GND GND
Software Regression Testing VBUS DM_TXD DP_RXD 200 KOHm +/- 1% GND GND
MPx Mid-Rate Charger (450mA) 5V DP_RXD DM_TXD 100KOHm +/- 1% GND GND
MPx Dual-Rate VPA (450/850mA) 5V DP_RXD DM_TXD 10 KOHm +/- 1% GND GND
Open (2,4V) 2,4V High High Low Low Low Low High Low High 5V High
5V 3,4V High High High High Low Low Low Low High 5V High
9V 3,5V High High Low Low Low Low Low Low High 5V High
Open (2,4V) 2,4V High High Low Low High Low Low Low High Phone PPD Level High
Open (2,4V) 2,4V High High Low Low High High Low Low High Phone PPD Level High
0V 0V Low Low Low Low Low Low Low Low High Phone PPD Level High
1,225V 1,225V High High Low High Low Low Low Low High 5V High
1,68V 1,68V High High Low High Low Low Low Low High 5V High
1,68V 1,68V High High Low Low Low Low Low Low High 5V High
1,225V 1,225V High High Low Low Low Low Low Low High 5V High
0,82V 0,825V Low High Low High Low Low Low Low High 5V High
0,1V 0,1V Low Low Low High Low Low Low Low High 5V High
MUX1
(from Neptune)
U1400 13 12 3 15 7 4
DP_RXD HJACK_SPKR_L HJACK_SPKR_R AUDIO_IN
MUX2 MUX1 MUX2 0 0 0 1 1 0 0 1 0 1 USB Mode UART Mode Not used Mono Headset/ Carkit Stereo Mode
Note: V3 does not support Stereo Audio Fast Fash Mode USB ,,on the go"
( from / to PCAP)
EMU (Enhanced Mini USB) INTERFACE
8
DM_TXD
J_USB 2 3
LDP_DM Filter
U1200
RESET_B DM_TXD_OUT DM_RXD_OUT
(Enables USB_VBUS to PCap Inerface)
USB_EN
(Enable Pull Up Voltage to DP_RXD)
Power to PCap USB Bus Charger Detect ID Sense and Test
USB_VBUS EMU SENSE INTERFACE (U910, U911, U913, U915, U916, Q956, Q957) For details please see Schematic
( VCC - to PCap)
CHRG_DET_PU (Data Minus / Transmit Data) DM_TXD
(Data Plus / Receive Data)
DP_RXD
(Enables R984 as Test-Resistor on USB_ID, and used to mute SIHF by a pull down on USB_ID line)
Detect and Interupt
SNP_INT_CTL
PPD_DET_B SNP_INTB FACT_DET CHRG_DET AD6
(Phone Powered Device Detect - to U800) (Signal Navigation Protocol Interrupt- to U800) (Factory Detect- to U800) (Charge Detect- to U800)
4 1 5 G1-G4
(Shield)
USB_ID
(Analog /Digiatl Converter 6 - to PCap)
VBUS
(to Charging Circuit)
D960
BP USB_PWR EMU_3_3V USB_PWR
Switch BP Circuit 1 In 6 Out 3
Switch
BP
( from Neptune)
U950 C3 In A1 C1 En Mode A3 4
EMU_2_8V
SWBP_EN
U901
VBOOST
U7607
2 In U951 Out
Regulator
5
EMU_3_3V
GSM SERVICE SUPPORT GROUP LEVEL 3 AL Block Diagram
Revision Overview Rev. 1.0: Initial Block Diagram Rev.1.1: updated page 3 Table
2004.08.31 Rev. 1.1
V3
V3 Michael Hansen, Alexander Buehler Page 3of 3