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ORDER NO.
CRT4759
CD MECHANISM MODULE(S11.6STD)
CX-3287
CONTENTS
1. CIRCUIT DESCRIPTIONS................................................................................................................................ 3
2. MECHANISM DESCRIPTIONS ...................................................................................................................... 16
3. DISASSEMBLY ............................................................................................................................................... 22
PIONEER CORPORATION 1-1, Shin-ogura, Saiwai-ku, Kawasaki-shi, Kanagawa 212-0031, Japan
PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
K-ZZZ JULY 2011 Printed in Japan
1 2 3 4
This service manual describes the operation of the CD mechanism module incorporated in models
listed in the table below.
When performing repairs use this manual together with the specific manual for model under repair.
A
Model Service manual CD Mechanism Module
DEH-1400UB/XNEW5 CRT4728 CXK5804
DEH-1400UBB/XNEW5
DEH-1410UB/XNEW5
DEH-1420UB/XNEW5
DEH-14UB/XNUC CRT4727 CXK5804
DEH-1450UB/XNES
DEH-1450UB/XNES1
DEH-1450UBG/XNES
DEH-1490UB/XNID
B
DEH-34UB/XNUC CRT4720 CXK5804
DEH-3400UB/XNUC
DEH-3400UB/XNEW5
DEH-3450UB/XNES
DEH-3450UB/XNES1
DEH-3490UB/XNID
DEH-24UB/XNUC CRT4745 CXK5804
DEH-2400UB/XNUC
DEH-2400UB/XNEW5
DEH-2450UB/XNES
C DEH-2450UB/XNES1
DEH-2490UB/XNID
DEH-64BT/XNUC CRT4746 CXK5804
DEH-6400BT/XNUC
DEH-5400BT/XNUC
DEH-4400BT/XNEW5
DEH-4450BT/XNES
DEH-4490BT/XNID
DEH-44HD/XSUS CRT4747 CXK5804
DEH-4400HD/XSUS
D
E
F
CX-3287
2 1 2 3 4
5 6 7 8
1. CIRCUIT DESCRIPTIONS
As for recent CD LSI, LSI where RF amplifier and DAC which were peripheral circuits in addition to main
DSP are integrated has become mainstream. And RENESAS uPD63770 which is used in the machine is A
LSI where above LSI part and microcomputer part are integrated onto one chip.
B
C
Fig.1.0.1. Block diagram of uPD63770
D
E
F
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3
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1.1 PREAMPLIFIER PART
In this part, the Pick Up output signal is processed, and the signals to Servo Part, Demodulator Part and Control Part are
A
generated. The signal from Pick Up is converted to voltage (I-V conversion) in the preamplifier with built-in photo detector in
Pick Up, after addition in RF amplifier, and the signals such as RF, FE, TE and TE zero cross are obtained.
The Preamplifier Part is incorporated in CD LSI uPD63770 (IC201), and each part will be explained.
As the power supply of the LSI is single power supply (+3.3 V), the reference voltage of the LSI and that of Pick Up are REFO
(1.65 V) respectively.
REFO is the output obtained by passing REFOUT in LSI through the Buffer Amp, and is output from Pin 93 of the LSI.
All measurement is conducted based on this REFO.
(Note) Do not short-circuit REFO and GND by mistake at the time of measurement.
1.1.1 APC (Automatic Power Control) Circuit
B
As for laser diode, in case of constant current drive, the optical output has large negative temperature characteristic, so it is
necessary to control the current so that the output can become constant in the monitor diode. This is APC circuit. LD current
can be obtained by measuring the voltage between LD1 and V3R3 and dividing the value by 7.5 ohm. The current value is
approximately 30 mA. The voltage difference between LD1 and V3R3 will be about 225 mV.
CD Core Unit
C
D
Fig.1.1.1 APC
E
F
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1.1.2 RF Amp, RFAGC Amp
A
The photo detector output (A+C) and (B+D), after addition, amplification and equalizing in the LSI, are output to RFO terminal
as RF signal.
(This signal enables the check of eye pattern.)
Low-frequency component of voltage RFO: RFO = (A+B+C+D) x 2
RFO is used in FOK generating circuit and RF offset adjusting circuit.
RFO signal output from Pin 82 is input to Pin 81 again after outside AC coupling, then amplification is conducted in RFAGC
amplifier and RFAGC signal is obtained.
And also, RFAGC adjustment function described below is incorporated in the LSI and it changes the feedback gain of RFAGC
so as to obtain RFO output of 1.5 V.
And also, this RFO signal is used in EFM, DFCT, MIRR and FRAGC adjusting circuit.
CD Core unit
B
Detection of
DEFECT A3T
Setting of For Generation
RFOFF of RFOK
C
Setting of
RFOFF
Fig.1.1.2 RF/AGC/FE
D
1.1.3 Focus Error Amp
The Photo Detector outputs (A+C) and (B+D) are passed through the Differential Amp and the Error Amp and (A+C-B-D) is
output from Pin 95 as FE signal.
Low frequency component of voltage FE:
FE = (A+C-B-D) x 8.8 / 10k x 111 k / 61 k x 160 k / 72 k
= (A+C-B-D) x 3.5
In FE output, S curve of 1.5 Vpp (based on REFO) is obtained.
The cutoff frequency of the next-stage amplifier is 14.6 kHz.
E
1.1.4 RFOK Circuit
This circuit is for the signal which indicates the timing of focus-close and the condition of focus-close in play, and RFOK signal
is output from Pin 62.
As a signal, "H" is output at the focus-close and in play.
As for the RFOK signal, peak-hold of DC level of RFO is conducted in the next-stage Digital Part and comparison is conducted
at certain threshold level and it is generated, so the RFOK is "H" if there are no pits.
Therefore, also in the mirror surface of disc, focus-close is conducted.
And also, this signal is passed through LPF and provided to the microcomputer as FOK signal and used for protection and
gain change of RF amplifier.
F
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1.1.5 Tracking Error Amp
Photo detector output E and F are passed through Differential Amp and Error Amp, and (E-F) is output from Pin 98 as TE
A signal.
Low-frequency component of voltage TE:
FEO = (E-F) x 63 k / 112 k x 160 k / 160 k x 181 k / 45.4 k x 160 k / 80 k
= (E-F) x 4.48
In TE output, TE waveform of approximately 1.3 Vpp (based on REFO) is obtained.
The cutoff frequency of the next-stage amp is 21.1 kHz.
CD Core Unit
TE OFF Setting
B
Internal TEC
Fig.1.1.3 TE
C
1.1.6 Tracking Zero Cross Amp
The tracking zero cross signal (hereinafter called TEC signal) is the signal that TE signal is amplified fourfold and is used to
find the zero cross point of tracking error.
The purposes to find this zero cross point are the following two points.
1 Used for track count in carriage move and track jump
2 Used to detect he direction that the lens is moving at the time of tracking close
(used in the tracking brake circuit which is described below)
Frequency range of TEC signal: 300 Hz ~ 20 kHz
Voltage TEC = TE level x 4
In short, TEC level is 4.62 V in the calculation. It exceeds D range of Operational Amplifier and the signal clips. However, only
zero cross point is used as CD LSI, so there are no problems.
D
1.1.7 EFM Circuit
The circuit where RF signals are converted to digital signals, "0" and "1".
AGCO signal output from Pin 79 is input to Pin 78 after outside AC coupling, and is supplied to EFM circuit.
Lack of RF signal due to disc flaw and dirt and RF vertical asymmetry caused by manufacturing variations can not be removed
only by AC coupling. Therefore, the reference voltage ASY of the EFM comparator is controlled by using the property that the
probability of "0" and "1" is 50% in EFM signal.
This keeps the comparison level near the center of RFO signal level.
This reference voltage ASY is generated by passing the output of EFM comparator through LPF. EFM signal is output form
Pin 73.
E
EFM signal
F
Fig.1.1.4 EFM
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1.2 SERVO PART(uPD63770:IC201)
The Servo Part conducts servo control such as equalizing of error signal, in-focus, track jump, carriage move and others.
The DSP Part is the signal processing part, and conducts data decode, error correction, interpolation processing and others. A
FE signal and TE signal which are generated in the preamplifier stage are converted to digital (A/D conversion), through the
servo block, and the drive signal of focus, tracking and carriage system is output.
And also, EFM signal is decoded in the Signal Processing Part, is passed through D/A converter and, after D/A conversion,
audio signal is output.
Furthermore, the error signal of Spindle Servo is generated in the decoding processing, is supplied to the Spindle Servo Part,
and the drive signal of spindle is output.
As for each drive signal (FD, TD, SD and MD) of focus, tracking, carriage and spindle, PWM3 is output and it is converted to
analog in LPF.
Each drive signal which is converted to analog can be monitored in FIN, TIN, CIN and SIN.
After that, they are amplified, and supplied to each actuator and motor.
1.2.1 Focus Servo System B
The main equalizer of Focus Servo is composed of the Digital Equalizer Part.
The block diagram of Focus Servo is shown in Fig.1.2.1.
C
Fig.1.2.1 Focus Servo Block Diagram
In the Focus Servo System, it is necessary to keep the lens within the focus range in order to conduct focus close.
Therefore, move the lens up and down by focus search voltage of triangle wave to find the focus point.
And during that time, kick the spindle motor to keep the rotation at certain setup speed.
Servo LSI monitors FE signal and RFOK signal, and automatically conducts focus close at the appropriate point.
The focus close is conducted when the following three conditions are met.
1. When the lens moves toward the disc from a long distance.
2. RFOK = "H"
3. When FE crosses zero (zero cross). D
As a result, FE focuses to "0" (= REF0).
When the above conditions are met and focus close is conducted, FSS bit changes from "H" to "L", and after 10ms, the CPU
Part of LSI starts to monitor RFOK signal through LPF.
If RFOK signal is judged to be "L", the CPU Part of LSI takes various actions such as protection and others.
A sequence of actions related to focus close is shown in Fig.1.2.2. (In this diagram, the case where focus close cannot be
done is shown.)
If the focus close button is pushed in the state where the mode select of focus is set to 01 in the test mode, S curve, search
voltage and actual behavior of lens can be checked.
Search start
FD terminal output
E
Blind period The broken line in the diagram
Focus servo is not conducted (assumption)
FE CONTROL SIGNAL
Negligible - during the blind period.
FSS bit of SRVSTS1 register
RFOK SIGNAL
Judgment of the condition of
focus close in the state of
FSS and RFOK after 10 ms.
F
Fig.1.2.2 Timing of focus close point
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1.2.2 Tracking Servo System
A
The main equalizer of Tracking Servo is composed of the Digital Equalizer Part.
The block diagram of Focus Servo is shown in Fig. 1.2.3.
B
Fig.1.2.3 Block diagram of Focus Servo
a) Track jump
Track jump is automatically conducted by the autosequence function in LSI by the command form the CPU Part of LSI.
The system provides 1, 4, and multi track jump to 100 as track jump which is used in the search.
In the test mode, among them, 1, 32, 32*3 jump and carriage move can be done by selecting the mode and can be checked.
As for track jump, approximately half of the total number of jumps (10 tracks -> 5 tracks) is set by the CPU Part of LSI, the
number of track which has been set is counted by TEC signal.
The brake pulse is output during a certain period (set by the CPU Part of LSI) from the time when the set number of counts is
reached, and the lens is stopped.
C
This closes tracking and normal play can be continued.
To increase servo-draw at track jump, turning the brake circuit ON and Tracking Servo gain-up are conducted during 50ms afte
the stop of brake pulse.
FF/REW operation in the normal mode is realized by continuous single jump.
The velocity is approximately 10 times faster than the normal mode.
b) Brake circuit
As the servo-draw deteriorates at the setup and track jump, the brake circuit is used to stably draw to the servo loop.
The brake circuit conducts stable draw to the Tracking Servo by detecting the direction which the lens faces, outputting only the
drive signal opposite to the action direction, and slowing down the lens velocity.
The direction of track-slide is judged based on TEC signal, MIRR signal and the phase relation between them.
D
E
Fig. 1.2.4 Single track jump Fig.1.2.5 Multi track jump
F
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A
B
(Note) It is considered that the phase of equalizer output is the same as that of TEC.
Fig. 1.2.6 Track brake
C
D
E
F
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1.2.3 Carriage Servo System
Carriage Servo inputs the output of low-frequency content of the tracking equalizer (information of lens position) to the carriage
A
equalizer, gets certain gain and outputs the drive signal from the CD Part of LSI.
The signal is sent to the carriage motor through Driver IC.
B
Fig. 1.2.7 Carriage Servo block diagram
Concretely, when the lens offset in play achieves a certain level, it is necessary to move the whole Pick Up forward. So, the
gain of equalizer is set so that the voltage higher than starting voltage of the carriage motor can be output. As actual actions,
C
certain threshold level to the equalizer output is set in the Servo LSI and only when the equalizer output level exceeds the level,
the drive voltage is output.
This reduces the power consumption.
And also, due to decentering of disc and others, the output voltage of equalizer crosses the threshold level several times before
the whole Pick Up starts to move.
The output waveform of drive voltage from CD Part of LSI is pulse.
D
E
Fig.1.2.8 Carriage signal waveform
F
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1.2.4 Spindle Servo System
The Spindle Servo has the following mode. A
1. Kick:
Mode which is used in the acceleration of disc rotation at setup
2. Offset:
a) Used from the end of Kick to the completion of TBAL adjustment at setup
b) Used till recovery when focus is lost in play
In each case - To keep the rotation number of disc to the regular rotation number
3. Adaptive Servo:
CLV Servo mode at normal operation
The signal which indicates the condition (accordance / discordance) is produced by sampling WFCK/16 to find whether the
frame synchronizing signal is coincident with the output of internal frame counter in EFM demodulation block.
When this signal indicates discordance state 8 successive times, the state is judged to be asynchronous. All the rest is B
judged to be synchronous state.
In the Adaptive Servo, Draw Servo is automatically selected in the asynchronized state, and Stationary Servo is selected in
the synchronized state.
4. Brake:
Mode to stop the spindle motor. The brake voltage is output from Servo LSI by the CPU Part of LSI.
At this time, the waveform of EFM is monitored in the CD Part of LSI, and when the longest pattern of EFM exceeds a
certain period (the rotation slows sufficiently), the flag of the CD Part of LSI is set and the CPU Part of LSI turn off the brake
voltage. When the flag is not set after a lapse of a certain period, the CPU Part of LSI switches the mode from Brake Mode
to Stop Mode and the mode continues for a certain period. When the mode switches to the Stop Mode in the eject operation,
the disc is ejected after a lapse of above certain period.
5. Stop:
Mode which is used in POWER ON and in Eject. At this time, the voltage between both ends of spindle motor is 0V. C
6. Rough Servo:
Mode which is used in carriage feed (carriage move in long search and others).
The linear velocity is calculated based on the waveform of EFM, and H level or L level is input to the spindle equalizer.
This mode is also used when grating is checked in the test mode.
The block diagram of Spindle Servo is shown in Fig. 1.2.9.
D
Fig. 1.2.9 Spindle Servo block diagram
E
F
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1.3 AUTOMATIC ADJUSTMENT FUNCTION
This system automates all circuit adjustments in the CD Part of LSI.
All adjustments are automatically conducted every time a disc is inserted or the CD mode is selected with source key.
A
The content of each automatic adjustment will be explained below.
1.3.1 Automatic Adjustment of TE, FE, RF Offset
By this function, TE, FE and RF amp offset of the preamplifier when power is on is adjusted to each target value based on
REFO.
(Target value: (TE, FE, RF) = (0, 0, -0.8)[V])
Adjustment procedure:
(1) The CPU Part of LSI reads each offset in LDOFF state through the CD Part of LSI.
(2) The CPU Part of LSI calculates the voltage to be corrected based on the value which is read in (1), and
B
substitutes the corrected value to the given adjustment place.
1.3.2 Automatic Adjustment of Tracking Balance (T. BAL)
By this function, the output difference of Ech and Fch (Pick Up output) is equalized by changing the amp gain of the CD Part
of LSI.
Actually, the adjustment is done so that TE waveform can be symmetrized vertically (to REFO).
Adjustment procedure:
(1) After focus close,
(2) Kick the lens to the radial direction to certainly generate TE waveform.
(3) The CPU Part of LSI reads the offset of TE signal which has been calculated in LSI through the CD Part of LSI.
(4) The offset is judged in the CPU Part of LSI. (0, Positive or Negative)
C Offset = 0 -> Completion of adjustment
Offset = positive or negative -> Change Ech and Fch amp gain according to a rule.
After that, repeat (2) ~ (4). When "Offset = 0" or "Number of limit" is reached, complete it.
1.3.3 Automatic Adjustment of FE Bias
Function to maximize the RFO level by making the focus point best in play. The adjustment is done by using the phase
difference between 3T level waveform of RF waveform and the waveform of focus error in disturbance input.
As the disturbance is input to the focus loop, the adjustment is done at the same timing as the auto gain control described
below.
Adjustment procedure:
D (1) The disturbance is injected to the focus loop by the command from the CPU Part of LSI. (CD Part of Servo LSI)
(2) The swing of 3T component of RF signal is detected in the CD Part of LSI.
(3) The relation between the above 3T component and disturbance is process in the CD Part of LSI and the length and
direction of focus misalignment are detected.
(4) The CPU Part of LSI reads the detected result from the CD part of LSI by the command.
(5) The necessary correction is calculated in the CPU Part of LSI and the results are substituted to the bias adjustment
term of the CD part of LSI.
In this adjustment, like the auto gain control, a sequence of adjustments is repeated several times to increase the accuracy of
adjustment.
1.3.4 Focus, Tracking AGC
E
By this function, Servo Loop gain of focus and tracking is automatically adjusted.
Adjustment procedure:
(1) The disturbance is injected to servo loop.
(2) The error signal (FE, TE) in the injection of disturbance is extracted through B.P.F., and the signals, G1 and G2,are
obtained.
(3) The CPU Part of LSI reads G1 and G2 signal through the CD Part of LSI.
(4) The necessary correction is calculated in the CPU Part of LSI, and the loop gain is adjusted in the CD Part of LSI.
The same adjustment procedure is repeated several times to increase the accuracy of adjustment.
F
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1.3.5 Automatic Adjustment of RF Level (RFAGC)
Bt this function, the variety of RF signal (RFO) which is caused by mechanism and disc factor is adjusted to a certain value for A
the certain signal transmission.
The adjustment is done by changing the amp gain between RFO and RFAGC.
Adjustment procedure:
(1) The CD Part of LSI reads the output from RF level detection circuit in the CD Part of LSI with the use of command.
(2) The CPU Part of LSI calculates the amount of amp gain which is target RFO level based on the read value.
(3) The corresponding command is sent from the CPU Part of LSI to the CD Part of LSI to obtain the amount of gain of (2).
This adjustment is done at the following time.
In setup, Time when only focus close is completed
Just before setup is completed (just before play)
B
1.3.6 Adjustment of Preamp Stage Gain
By this function, the gain of whole RFAMP (amps of FE, TE and RF) is set to +6 dB or +12 dB depending to the situation
when the lens is dirty or the reflected light of disc is extremely poor in play of CD-RW and others.
Adjustment procedure:
If the reflection of disc in setup is judged to be extremely poor, the whole RFAMP is set to +6 dB or +12 dB.
1.3.7 Adjustment Initial Value
The all automatic adjustment after the disc is inserted starts with the initial value.
C
In the automatic adjustment by source change and ACC ON, basically the previous adjustment value is the initial value.
1.3.8 Indication of Coefficient of Adjustment Result
In some automatic adjustments (FE, RF offset, FZD cancel, F, T and RFAGC), the results can be indicated in test mode and be
checked.
The indication of coefficient in each automatic adjustment is as follows.
(1) FE and RF offset reference value = 32 (The coefficient of 32 means that the adjustment is not required.)
Indication: approximately 32 mV unit
Example: FE offset coefficient = 35
35