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INTEGRATED CIRCUITS
DATA SHEET
TDA8060TS Satellite ZERO-IF QPSK down-converter
Product specification Supersedes data of 1999 Aug 30 File under Integrated Circuits, IC02 1999 Nov 11
Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
FEATURES · Direct conversion QPSK demodulation (Zero IF) · 920 to 2200 MHz range · On-chip loop-controlled 0 or 90° phase shifter · Variable gain on RF input · 60 MHz, at -1 dB, bandwidth for baseband I and Q amplifiers · Local oscillator output to PLL satellite or terrestrial · 5 V supply voltage. APPLICATIONS · Direct Broadcasting Satellite (DBS) QPSK demodulation · Digital Video Broadcasting (DVB) QPSK demodulation. GENERAL DESCRIPTION The direct conversion QPSK demodulator is the front-end receiver dedicated to digital TV broadcasting, satisfying both DVB and DBS TV standards. QUICK REFERENCE DATA SYMBOL VCC fosc Vo(p-p) Tamb supply voltage quadrature error oscillator frequency output voltage (peak-to-peak value) ambient temperature PARAMETER MIN. 4.75 - 920 - -20
TDA8060TS
The 920 to 2200 MHz wide range oscillator covers American, European and Asian satellite bands as well as the future SMA-TV US standard. Accurate QPSK demodulation is ensured by the on-chip loop-controlled phase shifter. The Zero-IF concept discards traditional IF filtering and intermediate conversion techniques. It also simplifies the signal path. The baseband I and Q signal bandwidth only depends, to a certain extent, on the external filter used in the application. Optimum signal level is guaranteed by a gain-controlled amplifier at the RF input. The GAIN pin sets the gain for both I and Q channels, providing a 30 dB range. The chip also offers a selectable internal LO prescaler (divide-by-2) and buffer that has been designed to be compatible with the input of a terrestrial or satellite frequency synthesizer.
TYP. 5.00 - - 0.75 -
MAX. 5.25 3 2200 - +85
UNIT V deg MHz V °C
ORDERING INFORMATION TYPE NUMBER TDA8060TS PACKAGE NAME SSOP24 DESCRIPTION plastic shrink small outline package; 24 leads; body width 5.3 mm VERSION SOT340-1
1999 Nov 11
2
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handbook, full pagewidth
BLOCK DIAGRAM
Philips Semiconductors
Satellite ZERO-IF QPSK down-converter
LOW-PASS FILTER VCC(RF) RFGND 6 9 VCC(LO1) LOGND1 VCC(LO2) LOGND2 16 15 19 22 IOUT 2 IBBIN 24
CONVERSION STAGE
I CONVERTER 23 IBBOUT
×
RFA 8 RFB 7 COMGAIN 4 LNA
SYM 100 MHz
ASYM
AMP
Q CONVERTER
BASEBAND STAGE
AMP 14 QBBOUT
×
QUADRATURE GENERATOR
STABILIZED LO PLL AND AMPLIFIER
SYM 100 MHz
ASYM
3
PEN 5 DIVIDE-BY-2 20 LOOUT 21 LOOUTC 18 TKA
1 12
VCC(BB1) VCC(BB2) BBGND1 BBGND2
TDA8060TS
OSCILLATOR
3 10 11 13
17 TKB
MGM318
QOUT QBBIN LOW-PASS FILTER
TDA8060TS
Product specification
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
PINNING SYMBOL VCC(BB1) IOUT BBGND1 COMGAIN PEN VCC(RF) RFB RFA RFGND BBGND2 QOUT VCC(BB2) QBBIN QBBOUT LOGND1 VCC(LO1) TKB TKA VCC(LO2) LOOUT LOOUTC LOGND2 IBBOUT IBBIN PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DESCRIPTION supply voltage 1 for baseband circuit (+5 V) `I' output from demodulator ground 1 for baseband circuit RF amplifier gain control input prescaler enable supply voltage for RF circuit (+5 V) RF signal input B RF signal input A ground for RF circuit ground 2 for baseband circuit `Q' output from demodulator supply voltage 2 for baseband circuit (+5 V) `Q' baseband amplifier input `Q' baseband amplifier output ground 1 for local oscillator circuit supply voltage 1 for local oscillator circuit (+5 V) tank circuit input B tank circuit input A supply voltage 2 for local oscillator circuit (+5 V) local oscillator output to synthesizer divided or not according to PEN voltage ground 2 for local oscillator circuit `I' baseband amplifier output `I' baseband amplifier input
BBGND2 10 QOUT 11 VCC(BB2) 12
MGM317
TDA8060TS
handbook, halfpage
VCC(BB1) 1 IOUT 2 BBGND1 3
24 IBBIN 23 IBBOUT 22 LOGND2 21 LOOUTC 20 LOOUT 19 VCC(LO2)
COMGAIN 4 PEN 5 VCC(RF) 6
TDA8060TS
RFB 7 RFA 8 RFGND 9 18 TKA 17 TKB 16 VCC(LO1) 15 LOGND1 14 QBBOUT 13 QBBIN
Fig.2 Pin configuration.
1999 Nov 11
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC Vi(max) tsc(max) Tamb Tstg Tj HANDLING supply voltage maximum input voltage on all pins maximum short-circuit time ambient temperature storage temperature junction temperature PARAMETER MIN. -0.3 -0.3 - -20 -55 -
TDA8060TS
MAX. +6.0 VCC 10 +85 +150 150 V V s °C °C °C
UNIT
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 120 UNIT K/W
DC CHARACTERISTICS Tamb = 25 °C; VCC = 5 V; unless otherwise specified. SYMBOL VCC ICC PARAMETER supply voltage supply current PEN = 5 V PEN = 0 V Conversion stage VI(RFA) VI(RFB) VO(IOUT) VO(QOUT) VO(LOOUT) VO(LOOUTC) VI(IBBIN) VI(QBBIN) VO(IBBOUT) VO(QBBOUT) DC input voltage on pin RFA DC input voltage on pin RFB DC output voltage on pin IOUT DC output voltage on pin QOUT - - - - - - - - - - 0.9 0.9 2.0 2.0 - - - - - - - - - - V V V V CONDITIONS MIN. 4.75 63 60 TYP. 5.00 73 70 MAX. 5.25 83 80 V mA mA UNIT
Quadrature generator DC output voltage on pin LOOUT DC output voltage on pin LOOUTC 4.7 4.7 V V
Baseband stage DC input voltage on pin IBBIN DC input voltage on pin QBBIN DC output voltage on pin IBBOUT DC output voltage on pin QBBOUT 2.5 2.5 2.5 2.5 V V V V
1999 Nov 11
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
AC CHARACTERISTICS Tamb = 25 °C; VCC = 5 V; unless otherwise specified. SYMBOL Quadrature generator fosc Nosc fLOOUT Vo(diff)(LOOUT) Zo(diff)(LOOUT) Conversion stage Ri(diff) Li(diff) Pi(max) Pi(min) Gv/V(slope) Gv(I-Q) td(g)(RF-IOUT) td(g)(RF-QOUT) td(g)(I-Q)(40) B(-1dB)(RF-IOUT) B(-1dB)(RF-QOUT) B(-3dB)(RF-IOUT) B(-3dB)(RF-QOUT) Zo(IOUT) Zo(QOUT) Vo(IOUT) Vo(QOUT) RoL(IOUT) RoL(QOUT) series real part of differential input impedance at pins RFA and RFB series inductance of differential input impedance at pins RFA and RFB maximum input power per channel minimum input power per channel AGC slope voltage gain mismatch between I and Q group delay variation per channel (40 MHz) from RF input to pin IOUT group delay variation per channel (40 MHz) from RF input to pin QOUT group delay mismatch per channel (40 MHz) between I and Q channel -1 dB bandwidth from RF input to pin IOUT channel -1 dB bandwidth from RF input to pin QOUT channel -3 dB bandwidth from RF input to pin IOUT channel -3 dB bandwidth from RF input to pin QOUT output impedance at pin IOUT output impedance at pin QOUT nominal output voltage level at pin IOUT nominal output voltage level at pin QOUT resistive load at pin IOUT resistive load at pin QOUT per channel per channel at Gv(RF-IOUT)(min) note 3 note 3 - - - - - - - - - 40 40 70 70 - - - - 400 400 oscillator frequency range oscillator phase noise absolute quadrature error output frequency differential output voltage at pin LOOUT differential output impedance at pin LOOUT at 10 kHz offset; note 1 note 2 VPEN = 0 V VPEN = VCC RL = 100 differential 920 - - - - -30 - - PARAMETER CONDITIONS MIN.
TDA8060TS
TYP. MAX.
UNIT
2200 MHz -75 3 - - - - - - - - 43 1 2 2 0.5 - - - - - - - - - - dBc/Hz deg MHz MHz dBm nH dBm dBm dB/V dB ns ns ns MHz MHz MHz MHz dBmV dBmV
-80 0 fosc 1/ f 2 osc -22 60
34 5 -22 -52 30 - 0.5 0.5 0 50 50 80 80 65 65 25 25 - -
1999 Nov 11
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
TDA8060TS
SYMBOL SYMMETRICAL RF INPUT (Fig.3) Gv(RF-IOUT)(min) Gv(RF-IOUT)(max) Gv(RF-QOUT)(min) Gv(RF-QOUT)(max) IP3i(I) IP2i(I) IP3i(Q) IP2i(Q) Fi
PARAMETER
CONDITIONS
MIN. - 28 - 28 1 12 1 12
TYP. MAX. - 29 - 29 4 15 4 15 12 -1 - -1 - - - - - 15
UNIT
minimum voltage gain from RF input to pin IOUT maximum voltage gain from RF input to pin IOUT minimum voltage gain from RF input to pin QOUT maximum voltage gain from RF input to pin QOUT I 3rd-order interception point at RF input I 2nd-order interception point at RF input Q 3rd-order interception point at RF input Q 2nd-order interception point at RF input noise figure at maximum gain
VAGC = 0.1 x VCC; note 4 VAGC = 0.9 x VCC; note 4 VAGC = 0.1 x VCC; note 4 VAGC = 0.9 x VCC; note 4
dB dB dB dB dBm dBm dBm dBm dB
VAGC = 0.9 x VCC; Zsource = 50 VAGC = 0.1 x VCC; note 5 VAGC = 0.9 x VCC; note 5 VAGC = 0.1 x VCC; note 5 VAGC = 0.9 x VCC; note 5
-
ASYMMETRICAL RF INPUT (Fig.4) Gv(RF-IOUT)(min) Gv(RF-IOUT)(max) Gv(RF-QOUT)(min) Gv(RF-QOUT)(max) IP3i(I) IP2i(I) IP3i(Q) IP2i(Q) Fi Baseband stages Zi Vi NTXi Gv(IBBIN-IBBOUT) Gv(QBBIN-QBBOUT) Gv(I-Q) IP3i IP2i td(g)(40) td(g)(I-Q)(40) input impedance nominal input voltage level number of channels at input voltage gain from pin IBBIN to pin IBBOUT voltage gain from pin QBBIN to pin QBBOUT voltage gain mismatch between I and Q 3rd-order interception point at IQBBIN input 2nd-order interception point at IQBBIN input group delay variation in 40 MHz bandwidth group delay mismatch in 40 MHz band between I and Q per channel - - - 19 19 - 54 72 - - 10 25 2 20 20 0 59 79 0.5 0.5 - - - 22 22 1 - - 2 2 k dBmV - dB dB dB dBmV dBmV ns ns minimum voltage gain from RF input to pin IOUT maximum voltage gain from RF input to pin IOUT minimum voltage gain from RF input to pin QOUT maximum voltage gain from RF input to pin QOUT I 3rd-order interception point at RF input I 2nd-order interception point at RF input Q 3rd-order interception point at RF input Q 2nd-order interception point at RF input noise figure at maximum gain VAGC = 0.9 x VCC; Zsource = 50 - - - - - - - - - - 29 - 29 3 15 3 15 13 -1 - -1 - - - - - - dB dB dB dB dBm dBm dBm dBm dB
1999 Nov 11
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
TDA8060TS
SYMBOL B(-1dB) B(-3dB) Zo Vo(p-p) Ro(L) td(g)(I-Q)(40) td(g)(I-Q)(R40) Gv(I-Q)(40) GR(I-Q)(40) Gv(RF-IBBOUT)(min) Gv(RF-IBBOUT)(max) Gv(RF-QBBOUT)(min)
PARAMETER channel -1 dB bandwidth channel -3 dB bandwidth output impedance nominal output voltage level resistive load at output
CONDITIONS
MIN. 40 70 - - 400 - - - -
TYP. MAX. 65 100 50 750 - 0.5 0.5 - - - 49 - 49 13 - - - - - 2 1 1 1
UNIT MHz MHz mV ns ns dB dB
Overall with a 100 nF capacitor instead of LP1 and LP2 group delay mismatch in 40 MHz band between I and Q group delay ripple in 40 MHz band for I or Q voltage gain mismatch in 40 MHz band between I and Q voltage gain ripple in 40 MHz band for I or Q
SYMMETRICAL RF INPUT minimum voltage gain from RF input to pin IBBOUT maximum voltage gain from RF input to pin IBBOUT minimum voltage gain from RF input to pin QBBOUT VAGC = 0.1 x VCC VAGC = 0.9 x VCC VAGC = 0.1 x VCC VAGC = 0.9 x VCC VAGC = 0.9 x VCC; Zsource = 50 VAGC = 0.1 x VCC VAGC = 0.9 x VCC VAGC = 0.1 x VCC VAGC = 0.9 x VCC VAGC = 0.9 x VCC; Zsource = 50 - 48 - 48 - 19 - 19 - 16 dB dB dB dB dB
Gv(RF-QBBOUT)(max) maximum voltage gain from RF input to pin QBBOUT Fi noise figure at maximum gain
ASYMMETRICAL RF INPUT Gv(RF-IBBOUT)(min) Gv(RF-IBBOUT)(max) Gv(RF-QBBOUT)(min) minimum voltage gain from RF input to pin IBBOUT maximum voltage gain from RF input to pin IBBOUT minimum voltage gain from RF input to pin QBBOUT - - - - - - 49 - 49 14 19 - 19 - - dB dB dB dB dB
Gv(RF-QBBOUT)(max) maximum voltage gain from RF input to pin QBBOUT Fi Notes noise figure at maximum gain
1. Measured in baseband (at pin IOUT or pin QOUT) on a carrier at 2 MHz and 25 dBmV. 2. Quadrature error with respect to 90°. 3. The differential input impedance of the IC is 34 in series with the IC pins which give an inductance of 5 nH. For optimum performance, this inductance should be cancelled by a matching network. Coupling capacitors of 1 pF give an acceptable result. 4. Gain = Vo(dB) - Vi(dB) (see Fig.3). Gain for symmetrical RF input 5. Gain = Vo(dB) - Vi(dB) (see Fig.3). Gain for asymmetrical RF input
1999 Nov 11
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
TDA8060TS
handbook, full pagewidth
50 100 RF SOURCE Vi (dB)
50
50
1 pF 1 pF
RFA RFB
IOUT
TDA8060TS
QOUT
RF SOURCE 50
high impedance probe
Vo (dB)
MGM319
Fig.3 Gain control diagram for symmetrical RF input.
handbook, full pagewidth
50
1.5 pF 1.5 pF
RFB RFA
IOUT
TDA8060TS
QOUT
RF SOURCE
high impedance probe
Vo (dB)
FCE406
50
RF SOURCE
50
Vi (dB)
Fig.4 Gain control diagram for asymmetrical RF input
1999 Nov 11
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
APPLICATION INFORMATION Close attention should be paid to the design of the external tank circuit of the VCO so that it covers the 920 to 2200 MHz frequency range. Both series 6 resistors kill all parasitic oscillations that could alter this frequency range. The BB835 Siemens varicap diodes are mentioned because they provide the highest Cmax/Cmin ratio as well as the least parasitic elements in our frequency range. The U-shaped inductance can be printed with a total length of approximately 20 mm. Filters LP1 and LP2 are not detailed in this data sheet because their design only depends on the global system. As the TDA8060 has been designed to be compatible with DVB, DSS and Asian DVB, the cut-off frequencies and the tolerance in group delay, the orders of the filters cannot be globally established.
TDA8060TS
Nevertheless, TDA8060 internally filters the baseband at 100 MHz and the nominal levels at inputs and outputs mentioned in the specification table should be respected. The input impedance of LP1 and LP2 must exceed 400 to avoid signal distortion. The converter outputs (pin IOUT and pin QOUT) must be AC-coupled via the low-pass filter to the baseband amplifiers inputs (pin IBBIN and pin QBBIN). Because of the high impedance at pin IQBBIN, a 100 nF capacitor gives a high-pass frequency of 160 Hz.
1999 Nov 11
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1999 Nov 11
VCC(RF) RFGND 6 9 16 15 19
Philips Semiconductors
Satellite ZERO-IF QPSK down-converter
LOW-PASS FILTER(3) 100 nF
VCC(LO1) LOGND1 VCC(LO2) LOGND2 22
IOUT 2
IBBIN 24
CONVERSION STAGE
I CONVERTER 23 IBBOUT LOW-PASS FILTER(3) to I channel ADC
1 pF RF
(2)
×
RFA RFB 8 7 LNA 4
SYM 100 MHz
ASYM
AMP
RF 1 pF gain(1)
Q CONVERTER
BASEBAND STAGE
AMP 14 QBBOUT LOW-PASS FILTER(3) to Q channel ADC
COMGAIN
×
QUADRATURE GENERATOR
STABILIZED LO PLL AND AMPLIFIER
SYM 100 MHz
ASYM
100 nF
1 12
VCC(BB1) VCC(BB2) BBGND1 BBGND2
11
0 to 5 V PEN 5
TDA8060TS
DIVIDE-BY-2 OSCILLATOR
3 10 11 13
20 LOOUT
21 LOOUTC
18 TKA 6 1 pF
17 TKB 6
MGM320
QOUT QBBIN 100 nF LOW-PASS FILTER(3)
to PLL synthesizer IC
20 k
BB835 (2×)
20 k
Vtune from PLL synthesizer IC
TDA8060TS
Product specification
(1) Gain control voltage; minimum gain at 0.1 x VCC, maximum gain at 0.9 x VCC; 30 dB range. (2) Differential RF input 950 to 2200 MHz; level = -22 to -52 dBm per channel. (3) The filter input impedance is 400 minimum.
Fig.5 Application diagram.
Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
PACKAGE OUTLINE SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
TDA8060TS
SOT340-1
D
E
A X
c y HE v M A
Z 24 13
Q A2 pin 1 index A1 (A 3) Lp L 1 e bp 12 w M detail X A
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 8.4 8.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 0.8 0.4 8 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT340-1 REFERENCES IEC JEDEC MO-150AG EIAJ EUROPEAN PROJECTION
ISSUE DATE 93-09-08 95-02-04
1999 Nov 11
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. Manual soldering
TDA8060TS
If wave soldering is used the following conditions must be observed for optimal results: · Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. · For packages with leads on two sides and a pitch (e): larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. · For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable suitable(2) recommended(3)(4) recommended(5) suitable not not suitable suitable suitable suitable suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not
TDA8060TS
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
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Philips Semiconductors
Product specification
Satellite ZERO-IF QPSK down-converter
NOTES
TDA8060TS
1999 Nov 11
15
Philips Semiconductors a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 © Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
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Printed in The Netherlands
545004/25/04/pp16
Date of release: 1999
Nov 11
Document order number:
9397 750 06554