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PC BOARD REPAIR MANUAL
MULTIFUNCTIONAL DIGITAL SYSTEMS
e-STUDIO202L/232/282
File No. RME05000700
R051221A2300-TTEC
Ver00_2006-01
© 2006 TOSHIBA TEC CORPORATION All rights reserved
Under the copyright laws, this manual cannot be reproduced in any form without prior written permission
of TOSHIBA TEC CORPORATION. No patent liability is assumed, however, with respect to the use of the
information contained herein.
GENERAL PRECAUTIONS REGARDING THE SERVICE FOR
e-STUDIO202L/232/282 SERIES
The installation and service should be done by a qualified service
technician.
1) Transportation/Installation
- When transporting/installing the equipment, employ two persons and be sure to hold the posi-
tions as shown in the figure.
The equipment is quite heavy and weighs approximately 75 kg (165.34 lb.) therefore pay full
attention when handling it.
- Be sure not to hold the movable parts or units (e.g. the control panel, ADU or RADF) when trans-
porting the equipment.
- Be sure to use a dedicated outlet with AC 110 V / 13.2 A, 115 V or 127 V / 12 A, 220-240 V or 240
V / 8 A for its power source.
- The equipment must be grounded for safety.
- Select a suitable place for installation. Avoid excessive heat, high humidity, dust, vibration and
direct sunlight.
- Provide proper ventilation since the equipment emits a slight amount of ozone.
- To insure adequate working space for the copying operation, keep a minimum clearance of 80
cm (32") on the left, 80 cm (32") on the right and 10 cm (4") on the rear.
- The equipment shall be installed near the socket outlet and shall be accessible.
- Be sure to fix and plug in the power cable securely after the installation so that no one trips over
it.
05/11
2) General Precautions at Service
- Be sure to turn the power OFF and unplug the power cable during service (except for the service
should be done with the power turned ON).
- Unplug the power cable and clean the area around the prongs of the plug and socket outlet once
a year or more. A fire may occur when dust lies on this area.
- When the parts are disassembled, reassembly is the reverse of disassembly unless otherwise
noted in this manual or other related documents. Be careful not to install small parts such as
screws, washers, pins, E-rings, star washers in the wrong places.
- Basically, the equipment should not be operated with any parts removed or disassembled.
- The PC board must be stored in an anti-electrostatic bag and handled carefully using a wristband
since the ICs on it may be damaged due to static electricity.
Caution: Before using the wristband, unplug the power cable of the equipment and
make sure that there are no charged objects which are not insulated in the
vicinity.
- Avoid expose to laser beam during service. This equipment uses a laser diode. Be sure not to
expose your eyes to the laser beam. Do not insert reflecting parts or tools such as a screwdriver
on the laser beam path. Remove all reflecting metals such as watches, rings, etc. before starting
service.
- Be sure not to touch high-temperature sections such as the exposure lamp, fuser unit, damp
heater and areas around them.
- Be sure not to touch high-voltage sections such as the chargers, developer, high-voltage trans-
former, exposure lamp control inverter, inverter for the LCD backlight and power supply unit.
Especially, the board of these components should not be touched since the electric charge may
remain in the capacitors, etc. on them even after the power is turned OFF.
- Make sure that the equipment will not operate before touching potentially dangerous places (e.g.
rotating/operating sections such as gears, belts pulleys, fans and laser beam exit of the laser
optical unit).
- Be careful when removing the covers since there might be the parts with very sharp edges
underneath.
- When servicing the equipment with the power turned ON, be sure not to touch live sections and
rotating/operating sections. Avoid exposing your eyes to laser beam.
- Use designated jigs and tools.
- Use recommended measuring instruments or equivalents.
- Return the equipment to the original state and check the operation when the service is finished.
3) Important Service Parts for Safety
- The breaker, door switch, fuse, thermostat, thermofuse, thermistor, IC-RAMs including lithium
batteries, etc. are particularly important for safety. Be sure to handle/install them properly. If
these parts are short-circuited and their functions become ineffective, they may result in fatal
accidents such as burnout. Do not allow a short-circuit or do not use the parts not recommended
by Toshiba TEC Corporation.
4) Cautionary Labels
- During servicing, be sure to check the rating plate and cautionary labels such as "Unplug the
power cable during service", "CAUTION. HOT", "CAUTION. HIGH VOLTAGE", "CAUTION.
LASER BEAM", etc. to see if there is any dirt on their surface and if they are properly stuck to the
equipment.
5) Disposal of the Equipment, Supplies, Packing Materials, Used Batteries and IC-RAMs
- Regarding the recovery and disposal of the equipment, supplies, packing materials, used batter-
ies and IC-RAMs including lithium batteries, follow the relevant local regulations or rules.
Caution:
Dispose of used batteries and IC-RAMs including lithium batteries according to this manual.
Attention:
Se débarrasser de batteries et IC-RAMs usés y compris les batteries en lithium selon ce manuel.
Vorsicht:
Entsorgung der gebrauchten Batterien und IC-RAMs (inclusive der Lithium-Batterie) nach diesem Handbuch.
CONTENTS
e-STUDIO202L/232/282
1. SYSTEM BLOCK DIAGRAM ........................................................................................ 1-1
2. GENERAL DESCRIPTION OF MAIN IC....................................................................... 2-1
2.1 Scanner CPU (TMP95C063F) ............................................................................................. 2-1
2.1.1 Outline and features ................................................................................................. 2-1
2.1.2 Functions .................................................................................................................. 2-2
2.1.3 Pin assignment ......................................................................................................... 2-2
2.1.4 Signals...................................................................................................................... 2-3
2.2 Engine CPU (TMP95C063F) ............................................................................................... 2-8
2.2.1 Outline and features ................................................................................................. 2-8
2.2.2 Functions .................................................................................................................. 2-8
2.2.3 Pin assignment ......................................................................................................... 2-8
2.2.4 Signals...................................................................................................................... 2-9
2.3 Gate Array (EC/N075) ....................................................................................................... 2-15
2.3.1 Functions ................................................................................................................ 2-15
2.3.2 Pin assignment ....................................................................................................... 2-15
2.3.3 Signals.................................................................................................................... 2-16
3. ELECTRIC CIRCUIT DIAGRAMS................................................................................. 3-1
3.1 System control circuit (SYS board)...................................................................................... 3-2
3.2 Logic circuit (LGC board)................................................................................................... 3-20
3.3 Scanning section control circuit (SLG board) .................................................................... 3-39
3.4 CCD drive circuit (CCD board) .......................................................................................... 3-52
3.5 Laser control signal relay circuit (LRL board) .................................................................... 3-54
3.6 Laser drive circuit (LDR board).......................................................................................... 3-55
3.7 Laser beam detection circuit (SNS board)......................................................................... 3-57
3.8 ADU drive circuit (ADU board)........................................................................................... 3-58
3.9 Display circuit (DSP board)................................................................................................ 3-60
3.10 Key control circuit (KEY board).......................................................................................... 3-61
3.11 Fuse circuit (FUS board).................................................................................................... 3-62
3.12 Facsimile circuit (FAX board: GD-1150) ............................................................................ 3-63
3.13 Modem circuit (MDM board: GD-1160).............................................................................. 3-77
3.14 Telephone line network control circuit (NCU board: GD-1150/1160)
*Only for NA/TW model ..................................................................................................... 3-81
3.15 Telephone line network control circuit (NCU board: GD-1150/1160)
*Only for EU/AU/AS/C models........................................................................................... 3-83
January 2006 © TOSHIBA TEC e-STUDIO202L/232/282 CONTENTS
1
e-STUDIO202L/232/282 CONTENTS January 2006 © TOSHIBA TEC
2
January 2006 © TOSHIBA TEC
1.
SYSTEM BLOCK DIAGRAM
CCD SLG SYS LGC LRL Laser unit
SNS
(Odd) Laser beam sensor
Amp A/D
CCD ASIC ASIC
(Even) LDR
Amp A/D
ASIC Laser diode
8
Data-bus
8 8 16 16
SRAM Flash ROM 8
ASIC 32 Page memory
128KB 512KB Scanner-CPU (SDRAM)
22MHz 16MB x 2
Data-bus
Download jig Motors 8
RADF FRAM
256KB
Bus transceiver
Control panel
Engine-CPU
24MHz Flash ROM
8
512KB
Fig. 1-1
32 Download jig
1-1
Wireless LAN
module 32
16 16
PCI-bus Data-bus
Finisher
8 8 8 8
32 32 32
PCI slot
IPC Finisher
NVRAM SRAM
32 32
64 ASIC 8KB 128KB
Scrambler
board System-CPU (Gate Array)
ASIC Bridge unit
333MHz
e-STUDIO202L/232/282 SYSTEM BLOCK DIAGRAM
HDD 64 Main memory
USB connector (device) Job separator/Offset tray
(DDR DIMM) Flash ROM I/O
USB connector (host: external) 256MB 8MB x 2
ASIC
PFP/LCF HVT Sensors Solenoids
USB connector (host: internal)
32
32 Key copy
Bluetooth North bridge ADU* Motors Clutches
counter
module (System controller)
Copy key Bypass
Switches
PSTN NCU EEPROM card unit
16 16
External TEL (LINE-1) 1KB
NCU
PSTN FAX ASIC SRAM
(LINE-2) RTC Download jig
512KB
Modem
Battery
: Option
LAN connector
(10BASE-T/100BASE-TX) Ether PHY
*ADU is available as an option for some models or destinations.
1
e-STUDIO202L/232/282 SYSTEM BLOCK DIAGRAM January 2006 © TOSHIBA TEC
1-2
2. GENERAL DESCRIPTION OF MAIN IC
2.1 Scanner CPU (TMP95C063F)
2.1.1 Outline and features
The TMP95C063F is developed as a high-speed, advanced 16-bit microcontroller for a range of mid to
large-scale equipment.
2
This device is presented in a 144-pin plastic flat package. Its features are as follows.
1) Original high-speed 16-bit CPU (900H_CPU)
- Instruction mnemonics upwardly compatible with TLCS-90/900
- 16-Mbyte linear address space
- General-purpose registers using register bank system
- 16-bit multiplication/division instructions, bit transfer/arithmetic instructions
- Micro DMA: 4 channels (640 ns/2 bytes at 25 MHz)
2) Minimum instruction execution time: 160 ns (at 25 MHz)
3) Internal RAM: No
Internal ROM: No
4) External memory expansion
- Expandable up to 16 Mbytes (common to programs and data)
- External data bus width selection pin (AM8/16)
- Can use both 8- and 16-bit external buses
... Dynamic data bus sizing
5) Internal DRAM controller: 2 channels
- 2CAS/2WE selectable
6) 8-bit timer: 8 channels
7) 16-bit timer: 2 channels
8) Pattern generator: 4 bits, 2 channels
9) General-purpose serial interface: 2 channels
- Baud rate generated by external clock
10)10-bit A/D converter: 8 channels
11)8-bit D/A converter: 2 channels
12)Watchdog timer
13)Chip selector, wait controller: 4 blocks
14)Interrupt function:
- CPU interrupts: 2 (software interrupt instructions, illegal instructions)
- Internal interrupts: 22 (7 priority levels available)
- External interrupts: 11 (7 priority levels available)
15)Input/output ports
- 91 pins
16)Standby function
- 3 HALT modes (RUN, IDLE, STOP)
January 2006 © TOSHIBA TEC e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC
2-1
2.1.2 Functions
The Scanner CPU interfaces with the System CPU and RADF, and controls the whole system of the
scanning section such as the scan motor, APS sensor, exposure lamp and such. The Scanner CPU
also sets the parameter of each image processing ASIC. These control programs of the Scanner CPU
are stored in the Flash ROM on the SLG board. These programs can be updated by downloading the
new programs with the download jig, PC which is serially connected and so on.
2.1.3 Pin assignment
PD0/INT0
PC7/AN7
PC6/AN6
PC5/AN5
PC4/AN4
PC3/AN3
PC2/AN2
PC1/AN1
P07/AN0
VREFH
VREFL
DVCC
AVCC
DVSS
AVSS
PD1
PD2
PD3
PD4
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
A0
A1
A2
A3
A4
A5
A6
A7
A8
144 109
1 140 135 130 125 120 115 110 108
DAREFH
DVCC
DAREFL
A9
DAOUT0
A10
DAOUT1
105 A11
DVSS 5
A12
PB0/INT4/T18
A13
PB1/INT5/T19
A14
PB2/TO8
A15
PB3/TO9
100 A16/P20
PB4/INT6/TIA 10
A17/P21
PB5/INT7/TIB TMP95C063F A18/P22
PB6/TOA MFP144
A19/P23
PB7/TOB
A20/P24
PA0/TXD0
95 A21/P25
PA1/RXD0 15
A22/P26
PA2/CTS0
A23/P27
PA3/SCLK0
DVSS
DVCC
D15/P17
PA4/TXD1 TOP VIEW
90 D14/P16
PA5/RXD1 20
D13/P15
PA6/CTS1
D12/P14
PA7/SCLK1
D11/P13
NMI
D10/P12
P90/TI0
85 D9/P11
P91/TO1 25
D8/P10
P92/TI2
DVCC
P93/TO3
D7
P94/TI4
D6
P95/TO5
80 D5
P96/TI6 30
D4
P97/TO7
D3
T80/BS
D2
P81/SCOUT
D1
P82/WAIT 75 D0
AM8/16 35
DVSS
CLK
RD
36 73
40 45 50 55 60 65 70
37
72
DVSS
X1
X2
EA
RESET
WDTOUT
P83/NMI2
P84/INT0
P85/INT1
P86/INT2
P87/INT3
DVCC
P70/PG00
P71/PG01
P72/PG02
P73/PG03
P74/PG10
P75/PG11
P76/PG12
P77/PG13
DVSS
P67/UCAS3/UW3/WE3
P66/LCAS3/LW3/REFOUT3
P65/CAS3/WE3
P64/CS3/RAS3
P63/UCAS1/UW1/WE1
P62/LCAS1/LW1/REFOUT1
P61/CAS1/WE1
P60/CS1/RAS1
P57/CS2
P56/CS0
P55/R/W
P54/BUSAK
P53/BUSRQ
P52/HWR
WR
Fig. 2-1
e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC January 2006 © TOSHIBA TEC
2-2
2.1.4 Signals
Pin No. Port name Signal name I/O Function
1 DAREFH DAREFH I Reference voltage (H) for D/A converter (+5V)
2 DAREFL DAREFL I Reference voltage (L) for D/A converter
(Signal ground)
2
3 DAOUT0 MOTREF O Reference voltage for scan motor
4 DAOUT1 - - Not used (Open)
5 DVSS1 SG - Signal ground
6 PB0/INT4/TI8 DFSCST I RADF scanning start signal
7 PB1/INT5/TI9 - - Not used (Open)
8 PB2/TO8 DFRAK I RADF acknowledge signal:
SLG board <- RADF
9 PB3/TO9 EEMCLK O EEPROM clock
10 PB4/INT6/TIA DFRRQ I RADF request signal: SLG board <- RADF
11 PB5/INT7/TIB - - Not used (Open)
12 PB6/TOA PNCNT I Debug panel connection signal (L: connected)
(for debug)
13 PB7/TOB SSW I Debug panel SW status signal (for debug)
14 PA0/TXD0 SRXD O Reception data: SLG board -> SYS board
15 PA1/RXD0 STXDA I Transmission data: SLG board <- SYS board
16 PA2/CTS0 SRTSA I Transmission request signal:
SLG board <- SYS board
17 PA3/SCLK0 SCTS O Transmission clear signal:
SLG board -> SYS board
18 DVCC1 DVCC - +5V
19 PA4/TXD1 DFTXD O Transmission data: SLG board -> RADF
20 PA5/RXD1 DFRXD I Reception data: SLG <- RADF
21 PA6/CTS1 DFAK O Acknowledge signal: SLG board -> RADF
22 PA7/SCLK1 DFRQ O Request signal: SLG -> RADF
23 NMI /NMI I Non-maskable Interrupt signal (Pull-up: +5V)
24 P90/TI0 EEMCS O EEPROM chip select signal
25 P91/TO1 MOTCLK O Scan motor drive clock
26 P92/TI2 - - Not used (Open)
27 P93/TO3 LED O Download jig LED drive signal
28 P94/TI4 EEMDTIN I EEPROM read data
29 P95/TO5 EEMDTOUT O EEPROM write data
30 P96/TI6 3BAPS1 O Not used
31 P97/TO7 3BAPS2 O Not used
January 2006 © TOSHIBA TEC e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC
2-3
Pin No. Port name Signal name I/O Function
32 P80/BS 3BAPS3 O Not used
33 P81/SCOUT - - Not used (Open)
34 P82/WAIT - - Not used (Open)
35 AM8/16 WORD I Bus width selection signal
(H: 8-bit fixed, L: 8/16-bit coexisting)
36 CLK - - Not used (Open)
37 DVSS2 SG - Signal ground
38 X1 X1 I Clock input (22MHz)
39 X2 X2 O Clock output (22MHz)
40 EA /EA I Pull-down: signal ground
41 RESET MRST I Reset signal (Low-active)
42 WDTOUT WDTOUT O Watchdog output signal
(H: CPU is normal, L: CPU is out of control)
43 P83/NMI2 - - Not used (Open)
44 P84/INT0 - - Not used (Open)
45 P85/INT1 - - Not used (Open)
46 P86/INT2 DFCOPY - Not used (Open)
47 P87/INT3 VSYNC - Not used (Open)
48 DVCC2 +5V - +5V
49 P70/PG00 DEBUG0 O Debug signal [0]
50 P71/PG01 DEBUG1 O Debug signal [1]
51 P72/PG02 DEBUG2 O Debug signal [2]
52 P73/PG03 DEBUG3 O Debug signal [3]
53 P74/PG10 DEBUG4 O Debug signal [4]
54 P75/PG11 DEBUG5 O Debug signal [5]
55 P76/PG12 DEBUG6 O Debug signal [6]
56 P77/PG13 DEBUG7 O Debug signal [7]
57 DVSS3 SG - Signal ground
58 P67/UCAS3/UW3/ - - Not used (Open)
WE3
59 P66/LCAS3/LW3/ FANON O Not used
REFOUT3
60 P65/CAS3/WE3 FANCHG O Not used
61 P64/CS3/RAS3 CS3 O Chip select signal [3] (Low-active)
* For Flash (When PC download mode)
62 P63/UCAS/UW1/ - - Not used (Open)
WE
63 P62/LCAS/LW1/ LMPON O Exposure lamp ON signal (L: ON)
REFOUT1
e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC January 2006 © TOSHIBA TEC
2-4
Pin No. Port name Signal name I/O Function
64 P61/CAS1/WE1 CCDPSOFF - Not used (Open)
65 P60/CS1/RAS1 CS1 O Chip select signal [1] (Low-active)
* For SRAM
66 P57/CS2 CS2 O Chip select signal [2] (Low-active)
* For Flash ROM
67 P56/CS0 CS0 O Chip select signal [0] (Low-active)
2
* For ASIC
68 P55/R/W ASICWR O ASIC data bus input/output switching signal
(H: input, L: output)
69 P54/BUSAK PGNCNT I Not used
70 P53/BUSRQ TSTSEL I Not used
71 P52/HWR - - Not used (Open)
72 WR MWR O Write signal (Low-active)
73 RD MRD O Read signal (Low-active)
74 DVSS4 SG - Signal ground
75 D0 MDT[0] I/O Data bus [0]
76 D1 MDT[1] I/O Data bus [1]
77 D2 MDT[2] I/O Data bus [2]
78 D3 MDT[3] I/O Data bus [3]
79 D4 MDT[4] I/O Data bus [4]
80 D5 MDT[5] I/O Data bus [5]
81 D6 MDT[6] I/O Data bus [6]
82 D7 MDT[7] I/O Data bus [7]
83 DVCC3 +5V - +5V
84 D8/P10 MDT[8] I/O Data bus [8]
85 D9/P11 MDT[9] I/O Data bus [9]
86 D10/P12 MDT[10] I/O Data bus [10]
87 D11/P13 MDT[11] I/O Data bus [11]
88 D12/P14 MDT[12] I/O Data bus [12]
89 D13/P15 MDT[13] I/O Data bus [13]
90 D14/P16 MDT[14] I/O Data bus [14]
91 D15/P17 MDT[15] I/O Data bus [15]
92 DVSS5 SG - Signal ground
93 A23/P27 DWNLD O PC download enable signal (Low-active)
94 A22/P26 5VSWON O 5VSW power supply signal (Low-active)
95 A21/P25 PNGT O Debug panel control signals ON/OFF signal
(for debug)
96 A20/P24 - - Not used (Open)
January 2006 © TOSHIBA TEC e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC
2-5
Pin No. Port name Signal name I/O Function
97 A19/P23 SLEEP O ASIC sleep mode control signal (H: sleep mode)
98 A18/P22 MAD[18] O Address bus [18]
99 A17/P21 MAD[17] O Address bus [17]
100 A16/P20 MAD[16] O Address bus [16]
101 A15 MAD[15] O Address bus [15]
102 A14 MAD[14] O Address bus [14]
103 A13 MAD[13] O Address bus [13]
104 A12 MAD[12] O Address bus [12]
105 A11 MAD[11] O Address bus [11]
106 A10 MAD[10] O Address bus [10]
107 A9 MAD[9] O Address bus [9]
108 DVCC4 +5V - +5V
109 A8 MAD[8] O Address bus [8]
110 A7 MAD[7] O Address bus [7]
111 A6 MAD[6] O Address bus [6]
112 A5 MAD[5] O Address bus [5]
113 A4 MAD[4] O Address bus [4]
114 A3 MAD[3] O Address bus [3]
115 A2 MAD[2] O Address bus [2]
116 A1 MAD[1] O Address bus [1]
117 A0 MAD[0] O Address bus [0]
118 DVSS6 SG - Signal ground
119 PE7 PSYNC O Not used
120 PE6 APSON O APS sensor power supply control signal
(H: supply, L: cut off)
121 PE5 - - Not used (Open)
122 PE4 MOTMD3 O Scan motor control data [3]
123 PE3 MOTMD2 O Scan motor control data [2]
124 PE2 MOTMD1 O Scan motor control data [1]
125 PE1 MOTDIR O Scan motor rotational direction switch signal
(H: CCW, L: CW)
126 PE0 MOTEN O Scan motor hold ON/OFF signal (H: ON, L: OFF)
127 PD4 ROMDT I Download jig connection signal (L: connected)
128 PD3 DFCNT I RADF connection signal (L: connected)
129 PD2 APS3 I APS-3 sensor output signal (Low-active)
130 PD1 APS2 I APS-2 sensor output signal (Low-active)
e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC January 2006 © TOSHIBA TEC
2-6
Pin No. Port name Signal name I/O Function
131 PD0/INT8 APS1 I APS-1 sensor output signal (Low-active)
132 DVCC5 +5V - +5V
133 PC0/AN0 TSTMEM I Not used
134 PC1/AN1 3BAPSIN I Not used
135 PC2/AN2 +24VCHK I +24V voltage check 2
136 PC3/AN3 - - Signal ground
137 PC4/AN4 HOME I Carriage home position sensor detect signal
(H: home position)
138 PC5/AN5 PLTN I Platen sensor detect signal (H: closed L: open)
139 PC6/AN6 APSC I APS-C sensor output signal (Low-active)
140 PC7/AN7 APSR I APS-R sensor output signal (Low-active)
141 VREFH VREFH I Reference voltage (H) for A/D converter (+5V)
142 VREFL VREFL I Reference voltage (L) for A/D converter
(Signal ground)
143 AVSS AVSS I A/D converter ground (Signal ground)
144 AVCC AVCC I A/D converter power supply (+5V)
January 2006 © TOSHIBA TEC e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC
2-7
2.2 Engine CPU (TMP95C063F)
2.2.1 Outline and features
The Engine CPU employs the same elemental devices as those of the Scanner CPU. Refer to the
following pages for the outline and features of these elemental devices. P. 2-1 "2.1.1 Outline and fea-
tures"
2.2.2 Functions
The Engine CPU interfaces with the System CPU, gate array, laser unit and finisher controller PC board
(IPC board), and controls the whole system of the printer engine section. These control programs of the
Engine CPU are stored in the Flash ROM on the LGC board. These programs can be updated by
downloading the new programs with the download jig, PC which is serially connected and so on. The
adjustment/setting value related with the control of engine section is stored in the removable NVRAM
on the LGC board in order to prevent a data loss and simplify the data transfer process at the board
replacement.
2.2.3 Pin assignment
The Engine CPU employs the same elemental devices as those of the Scanner CPU. Refer to the
following pages for the pin assignment of these elemental devices. P. 2-2 "2.1.3 Pin assignment"
e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC January 2006 © TOSHIBA TEC
2-8
2.2.4 Signals
Pin No. Port name Signal name I/O Function
1 DAREFH DAREFH I Reference voltage (H) for D/A converter (+5V)
2 DAREFL DAREFL I Reference voltage (L) for D/A converter
(Signal ground)
2
3 DAOUT0 ADUVR-1 O Reference voltage for ADU motor current restriction
4 DAOUT1 ATSVR-1 O Reference voltage for Auto-toner sensor
5 DVSS1 SG - Signal ground
6 PB0/INT4/TI8 HTRSTOP-1 I Fuser unit abnormality control signal
(H: heater abnormal, L: normal)
7 PB1/INT5/TI9 OVERHEAT-1 I Fuser unit overheating detection signal
(H: overheated, L: normal)
8 PB2/TO8 PLLENM-0 O Phase locked loop control enable signal for main
clock (H: enable)
9 PB3/TO9 PLLENP-0 O Phase locked loop control enable signal for printer
clock (H: enable)
10 PB4/INT6/TIA SCOUT-1 I Timer clock input
* From pin33
11 PB5/INT7/TIB HVSDWN-1A I High-voltage transformer leakage detection signal
(H: high-voltage transformer abnormal, L: normal)
12 PB6/TOA POMCK-0 O Polygonal motor reference clock
13 PB7/TOB PS12NG-1 I +12V supervisory signal
(H: +12V abnormal L: normal)
14 PA0/TXD0 - O Not used
15 PA1/RXD0 - O Not used
16 PA2/CTS0 - O Not used
17 PA3/SCLK0 - I Not used
18 DVCC1 DVCC - +5V
19 PA4/TXD1 - O Not used
20 PA5/RXD1 - O Not used
21 PA6/CTS1 LED-1 O Download jig LED drive signal (L: LED ON)
22 PA7/SCLK1 FMBSY-0 I Flash ROM status signal (H: ready, L: busy)
23 NMI /NMI I Non-maskable Interrupt signal (Pull-up: +5V)
24 P90/TI0 - I Not used
25 P91/TO1 - I Not used
26 P92/TI2 - I Not used
27 P93/TO3 YDRV-0 O Not used
28 P94/TI4 SCOUT-1 I Timer clock input
* From pin33
January 2006 © TOSHIBA TEC e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC
2-9
Pin No. Port name Signal name I/O Function
29 P95/TO5 - - Not used
30 P96/TI6 - - -
31 P97/TO7 - - -
32 P80/BS PS5SNG-1 I +5VSW supervisory signal
(H: +5VSW abnormal, L: normal)
33 P81/SCOUT SCOUT O Timer clock output
* To pins10 and 28
34 P82/WAIT YFAN2L-0 O Not used
35 AM8/16 ROMDT-1 I Bus width selection signal
(H: 8-bit fixed, L: 8/16-bit coexisting)
36 CLK - - Not used (Open)
37 DVSS2 SG - Signal ground
38 X1 X1 I Clock input (24MHz)
39 X2 X2 O Clock output (24MHz)
40 EA /EA I Pull-down: signal ground
41 RESET CPURST-0 I Reset signal (Low-active)
42 WDTOUT WDT-0 O Watchdog output signal
(H: CPU is normal, L: CPU is out of control)
43 P83/NMI2 YFAN2H-0 O Not used
44 P84/INT0 STINT-1 I Transmission interrupt signal:
LGC board -> SYS board
45 P85/INT1 HSCTCP-1A I H-sync counter coincidence status signal
(H: coincided, L: not coincided)
46 P86/INT2 CMINT-1 I Reception interrupt signal:
LGC board <- SYS board
47 P87/INT3 PDWN-1 I Switching regulator power down signal
(H: regulator ON or OFF, L: normal)
48 DVCC2 +5V - +5V
49 P70/PG00 ADUM1A-0 O ADU motor drive signal [phase-A] (Low-active)
50 P71/PG01 ADUM1B-0 O ADU motor drive signal [phase-B] (Low-active)
51 P72/PG02 ADUM1C-0 O ADU motor drive signal [phase-C] (Low-active)
52 P73/PG03 ADUM1D-0 O ADU motor drive signal [phase-D] (Low-active)
53 P74/PG10 EXTMA-0 O Exit motor drive signal [phase-A] (Low-active)
54 P75/PG11 EXTMB-0 O Exit motor drive signal [phase-B] (Low-active)
55 P76/PG12 EXTMC-0 O Exit motor drive signal [phase-C] (Low-active)
56 P77/PG13 EXTMD-0 O Exit motor drive signal [phase-D] (Low-active)
57 DVSS3 SG - Signal ground
58 P67/UCAS3/UW3/ PWRFNL-0 O Internal cooling fan-2 low speed drive signal
WE3
e-STUDIO202L/232/282 GENERAL DESCRIPTION OF MAIN IC January 2006 © TOSHIBA TEC
2 - 10
Pin No. Port name Signal name I/O Function
59 P66/LCAS3/LW3/ PWRFNH-0 O Internal cooling fan-2 high speed drive signal
REFOUT3 PWRFNH-0 PWRFNL-0 Status
L L High speed drive
L H High speed drive
H L Low speed drive
H H Stop
60 P65/CAS3/WE3 RSTSW1-0 O Main switch reset signal 2
(H: normal L: reset (power is turn OFF))
61 P64/CS3/RAS3 CS3-0 O Chip select signal [3] (Low-active)
* For SRAM
62 P63/UCAS/UW1/ ERSLP-0 O Discharger LED drive signal (L: ON)