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September 1997

NDP6020P / NDB6020P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features

These logic level P-Channel enhancement mode power field -24 A, -20 V. RDS(ON) = 0.05 @ VGS= -4.5 V.
effect transistors are produced using Fairchild's proprietary, RDS(ON) = 0.07 @ VGS= -2.7 V.
RDS(ON) = 0.075 @ VGS= -2.5 V.
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state Critical DC electrical parameters specified at elevated
resistance, provide superior switching performance, and temperature.
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for Rugged internal source-drain diode can eliminate the need
low voltage applications such as automotive, DC/DC for an external Zener diode transient suppressor.
converters, PWM motor controls, and other battery powered
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