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SPEC No. LD-19X11A
ISSUE : Nov.19.2007
PAGE : 23 pages
DEVICE SPECIFICATION
TFT-LCD Module
MODEL
LQ0DZA0126
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RECORDS OF REVISION
LQ0DZA0126
SPEC No. DATE REVISED SUMMARY NOTE
No. PAGE
LD-19X11A Nov.19.2007 - - 1st Issue
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LD-19X11A-1
1. Application
This specification applies to color TFT-LCD module, LQ0DZA0126.
The device listed in these specification sheets was designed and manufactured for use in general electronic
equipment.
In case of using the device for applications such as control and safety equipment for transportation (aircraft,
trains, automobiles, etc.), rescue and security equipment and various safety related equipment which require
higher reliability and safety, take into consideration that appropriate measures such as fail-safe functions and
redundant system design should be taken.
Do not use the device for equipment that requires an extreme level of reliability, such as aerospace
applications, telecommunication equipment (trunk lines), nuclear power control equipment and medical or other
equipment for life support.
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LD-19X11A-2
2. Overview
This module is a color active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor).
It is composed of a color TFT-LCD panel, driver ICs, control circuit and power supply circuit and a backlight
unit. Graphics and texts can be displayed on a 800 3 600 dots panel with about 16-million-color by using
LVDS (Low Voltage Differential Signaling) system for interface and supplying +3.3V DC supply voltage for
TFT-LCD panel driving and supply voltage for backlight.
The TFT-LCD panel used for this module is a low-reflection and higher-color-saturation type.
Therefore, this module is also suitable for the multimedia use. Viewing angle is 6 o'clock direction.
Backlight-driving DC/AC inverter is not built in this module.
3. Outline Specifications
Parameter Specifications Unit
Display size 31 (12.1") Diagonal cm
Active area 246.0 (H) 184.5 (V) mm
Pixel format 800 (H) 600 (V) pixel
(1 pixel=R+G+B dots)
Aspect ratio 4 3
Pixel pitch 0.3075 (H) 0.3075 (V) mm
Pixel configuration R,G,B vertical stripe
Display mode Normally white
276.0(W) 209.0(H) Max.11.0 (D)
Unit outline dimensions *1 mm
*Outline dimensions is shown in Fig.1
Mass MAX. 660 g
Surface treatment Anti-glare and hard-coating 3H
[*1 Note] excluding backlight cables.
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LD-19X11A-3
4. Input Terminals
4-1. TFT-LCD panel driving
CN1 (LVDS signals, +3.3V DC power supply and Contorol signal)
Corresponding connector: DF14-20S-1.25C (Connector) [Hirose electric.,Ltd]
DF14-2628SCF (Terminal) [Hirose electric.,Ltd]
Pin No. Symbol Function Remark
1 VCC +3.3V power supply
2 VCC +3.3V power supply
3 GND
4 GND
5 RXIN0- Differential data input, CH0 (negative) LVDS signal
6 RXIN0+ Differential data input, CH0 (positive) LVDS signal
7 GND
8 RXIN1- Differential data input, CH1 (negative) LVDS signal
9 RXIN1+ Differential data input, CH1 (positive) LVDS signal
10 GND
11 RXIN2- Differential data input, CH2 (negative) LVDS signal
12 RXIN2+ Differential data input, CH2 (positive) LVDS signal
13 GND
14 RXCLK IN- Differential clock input (negative) LVDS signal
15 RXCLK IN+ Differential clock input (positive) LVDS signal
16 GND
17 RXIN3- Differential data input, CH3 (negative) LVDS signal
18 RXIN3+ Differential data input, CH3 (positive) LVDS signal
19 RL/UD Horizontal/Vertical display mode select signal [Note1]
20 LVDS_SET LVDS_SET [Note2]
[Note 1]
RL/UD = Low RL/UD = High
[Note 2] Relation between LVDS signals and actual data shows below section (4-2)
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LD-19X11A-4
4-2 Data Mapping
1) 8 bit input
note2 pin assignment with LVDS_SET pin (Thine:THC63LVDM83R)
Transmitter 20pin LVDS_SET
Pin No Data =L (GND) or Open =H (3.3V)
51 TA0 R0 (LSB) R2
52 TA1 R1 R3
54 TA2 R2 R4
55 TA3 R3 R5
56 TA4 R4 R6
3 TA5 R5 R7 (MSB)
4 TA6 G0 (LSB) G2
6 TB0 G1 G3
7 TB1 G2 G4
11 TB2 G3 G5
12 TB3 G4 G6
14 TB4 G5 G7 (MSB)
15 TB5 B0 (LSB) B2
19 TB6 B1 B3
20 TC0 B2 B4
22 TC1 B3 B5
23 TC2 B4 B6
24 TC3 B5 B7 (MSB)
27 TC4 (NA) (NA)
28 TC5 (NA) (NA)
30 TC6 DE DE
50 TD0 R6 R0 (LSB)
2 TD1 R7 (MSB) R1
8 TD2 G6 G0 (LSB)
10 TD3 G7 (MSB) G1
16 TD4 B6 B0 (LSB)
18 TD5 B7 (MSB) B1
25 TD6 (NA) (NA)
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LD-19X11A-5
< LVDS_SET = L or Open >
1 cycle
RXCKIN
RXCKIN-
RXIN0+
R1 R0 G0 R5 R4 R3 R2 R1 R0 G0
RXIN0-
RXIN1+
G2 G1 B1 B0 G5 G4 G3 G2 G1 B1
RXIN1-
RXIN2+
B3 B2 DE NA NA B5 B4 B3 B2 DE
RXIN2-
RXIN3+
R7 R6 NA B7 B6 G7 G6 R7 R6 NA
RXIN3-
DE: Display Enable
NA: Not Available
< LVDS_SET = H > 1 cycle
RXCKIN
RXCKIN-
RXIN0+
R3 R2 G2 R7 R6 R5 R4 R3 R2 G2
RXIN0-
RXIN1+
G4 G3 B3 B2 G7 G6 G5 G4 G3 B3
RXIN1-
RXIN2+
B5 B4 DE NA NA B7 B6 B5 B4 DE
RXIN2-
RXIN3+
R1 R0 NA B1 B0 G1 G0 R1 R0 NA
RXIN3-
DE: Display Enable
NA: Not Available
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LD-19X11A-6
2) 6 bit input
note2 pin assignment with LVDS_SET pin (Thine:THC63LVDM83R)
Transmitter 20pin LVDS_SET
Pin No Data =L (GND) or Open =H (3.3V)
51 TA0 R0 (LSB)
52 TA1 R1
54 TA2 R2
55 TA3 R3
56 TA4 R4
3 TA5 R5 (MSB)
4 TA6 G0 (LSB)
6 TB0 G1
7 TB1 G2
11 TB2 G3
12 TB3 G4
14 TB4 G5 (MSB)
15 TB5 B0 (LSB)
19 TB6 B1
20 TC0 B2
22 TC1 B3
23 TC2 B4
24 TC3 B5 (MSB)
27 TC4 (NA)
28 TC5 (NA)
30 TC6 DE
50 TD0 GND
2 TD1 GND
8 TD2 GND
10 TD3 GND
16 TD4 GND
18 TD5 GND
25 TD6 (NA)
1 cycle
RXCKIN
RXCKIN-
RXIN0+
R1 R0 G0 R5 R4 R3 R2 R1 R0 G0
RXIN0-
RXIN1+
G2 G1 B1 B0 G5 G4 G3 G2 G1 B1
RXIN1-
RXIN2+
B3 B2 DE NA NA B5 B4 B3 B2 DE
RXIN2-
DE: Display Enable
NA: Not Available
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4-3 Interface block diagram LD-19X11A-7
(Computer side) (TFT-LCD side)
8Bit Mode
LVDS_SET=L (20 pin=GND or OPEN)
Controller THC63LVDM83R Single LVDS interface contained in a control
7 RXIN0+(6) RA 0 - 6
R0-R5,G0 TA 0 - 6
7 RXIN0-(5) RB 0 - 6
TTL PARALLEL-TO-LVDS
LVDS-TO-PARALLEL TTL
G1-G5,B0,B1 TB 0 - 6
7 TC 0 - 6 RXIN1+(9) RC 0 - 6
B2-B5, NA,NA,DE
7 TD 0 - 6 RXIN1-(8) RD 0 - 6
Internal circuits
R6,R7,G6,G7,
B6,B7,NA RXIN2+(12)
RXIN2-(11)
RXIN3+(18)
RXIN3-(17)
RXCKIN+(15)
C K IN CK OUT
CK PLL RX KIN-(14) PLL
8Bit Mode
LVDS_SET=H (20 pin=3.3[V])
Controller THC63LVDM83R
Single LVDS interface contained in a control IC
7 RXIN0+(6) RA 0 - 6
R2-R7,G2 TA 0 - 6
RXIN0-(5)
7 LVDS-TO-PARALLEL TTL
TTL PARALLEL-TO-LVDS
TB 0 - 6 RB 0 - 6
G3-G7,B2,B3
7 TC 0 - 6 RXIN1+(9) RC 0 - 6
B4-B7, NA,NA,DE
7 RXIN1-(8) RD 0 - 6
TD 0 - 6
Internal circuits
R0,R1,G0,G1,
B0,B1,NA RXIN2+(12)
RXIN2-(11)
RXIN3+(18)
RXIN3-(17)
RXCKIN+(15)
C K IN CK OUT
CK PLL RX KIN-(14) PLL
6Bit Mode
LVDS_SET=H (20 pin=3.3[V])
Controller THC63LVDM83R
Single LVDS interface contained in a control IC
7 RXIN0+(6) RA 0 - 6
R0-R5,G0 TA 0 - 6
RXIN0-(5)
LVDS-TO-PARALLEL TTL
7
TTL PARALLEL-TO-LVDS
TB 0 - 6 RB 0 - 6
G1-G5,B0,B1
7 TC 0 - 6 RXIN1+(9) RC 0 - 6
B2-B5, NA,NA,DE
7 RXIN1-(8) RD 0 - 6
TD 0 - 6
Internal circuits
ALL NA
RXIN2+(12)
RXIN2-(11)
RXIN3+(18)
RXIN3-(17)
RXCKIN+(15)
C K IN CK OUT
CK PLL RX KIN-(14) PLL
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LD-19X11A-8
4-4. Backlight driving
CN2 ,CN3
Used connector: BHR-02 (8.0) VS-1N (JST)
Corresponding connector: SM02 (8.0) B-BHS-1R-TB (JST)
SM02 (8.0) B-BHS-1-TB (JST)
Connector FL Cable color
Pin No. Symbol function
No. CN2 CN3
Power supply for lamp
1 VHIGH White Pink
(High voltage side)
CN2,3
Power supply for lamp
2 VLOW Gray White
(Low voltage side)
5. Absolute Maximum Ratings
Parameter Symbol Condition Pin name Ratings Unit Remark
supply voltage Vcc Ta=25 oC Vcc -0.3 to 4.0 V [Note1,4]
Input voltage RXINi-/+(i= 0,1,2,3)
VI1 Ta=25oC -0.3 to Vcc+0.3 V
RXCLK IN-/+
VI2 Ta=25oC RL/UD, SELLVDS -0.3 to Vcc+0.3 V
Lump input voltage VHIGH - VHIGH (CN2,CN3) 0 to +2000 Vrms [Note1,2]
o
Storage temperature Tstg - - -30 to +75 C [Note1]
o
Operating temperature Topa panel - 0 to +70 C [Note1,3]
surface
[Note1] Humidity: 95%RH Max. at Ta=<40oC.
Maximum wet-bulb temperature at 39oC or less at Ta>40 oC.
No condensation.
[Note2] A high voltage should be not able to be continued when the lamp doesn't light
[Note3] When used on condition of Operating temperature [65 TOPA 70 ],
degradation of display grace, such as screen stain etc, may be caused.
[Note4] Please use the one of 2A or more in current capacity about the power-supply voltage.
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LD-19X11A-9
6. Electrical Characteristics
6-1.TFT-LCD panel driving Ta=+25 oC
Parameter Symbol Min. Typ. Max. Unit Remark
Supply voltage Vcc +3.0 +3.3 +3.6 V [Note4]
Current dissipation Vcc=+3.3V Icc - 290 380 mA [Note5]
Input voltage range LVDS signal VL 0 - 2.4 V [Note3]
Permissive input ripple voltage Vcc=+3.3V VRP - - 100 mVp-p Vcc=+3.3V
VCM
High VTH - - mV
Differential input +100 VCM=1.2V
VCM
threshold voltage Low VTL - - mV [Note1]