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Keysight Technologies
Tips and Techniques for Accurate
Characterization of 28 Gb/s Designs
Application Note
Introduction
The worldwide demand for data Measurement Challenges
capacity in networks greatly increases
every year, driven by services like cloud
Lower jitter budgets. High measurement
computing and Video on Demand.
As installed networks approach their As rates increase, the bit periods idelity required.
capacity, operators need to either become shorter. With shorter bit To ensure the signal is accurately
add physical capacity, which is very periods, the jitter must be lower represented by the oscilloscope, high
expensive, or transfer more data than ever before, even to the sub- data rate applications require more
through the existing networks. These picosecond range. To ensure accurate measurement bandwidth, lower noise
factors drive the need for much higher transmitter characterization, the and minimization of delays between
data rates, and the medium and intrinsic jitter of test equipment must trigger and data stream.
long haul transmission is handled by be significantly less than the specified
fiber optic networks. Data is initially transmitter jitter.
Analyzing closed eyes.
and finally handled within electrical
circuits, and is limited to relatively After high speed signals have passed
Clock recovery required. through a backplane or similar lossy
short distances primarily because of
the loss in electrical channels. Within While sampling oscilloscopes are channel, the inter-symbol interference
a few short years, the challenges known for their high measurement (ISI) that is introduced may close the
of developing solutions that handle accuracy, they require a synchronous eye entirely. Innovative measurement
10 Gb/s have faded and have been clock as a trigger. Often there is techniques allow the user to
replaced with new challenges at rates no access to a suitable clock, or re-open the eye and characterize the
of 14 Gb/s to 120 Gb/s, resulting in a clock recovery must be utilized for parameters.
proliferation of multi-channel standards compliance reasons, and hardware
and applications. clock recovery must be employed.
Keysight Technologies, Inc. continues
to anticipate and provide innovative
test solutions as designers move
through early development and
validation cycles. This application note
focuses on test solutions for electrical
transmitters operating from 10 Gb/s to
28 Gb/s and beyond, and covers the
commonly required test parameters
and techniques.
2
Applicable Standards and Measurements
Earlier standards such as SONET Standard Data Rates Link Type Distance
and SDH have been replaced by
IEEE 802.3ap, 10 G 10.3125 Gb/s Backplane <1m
standards such as IEEE's 802.3
and the Optical Internetworking IEEE 802.3ba, 40 G 4 x 10.3125 Gb/s Chip-to-chip
Backplane <1m
Forum Common Electrical I/O (OIF
Copper cable <7m
CEI). Some standards focus on the
optical interfaces, some on electrical IEEE 802.3ba, 100 G 10 x 10.3125 Gb/s Chip-to-module
interfaces, and some on both. This IEEE 802.3ba, 100 G 4 x 25.78 Gb/s Chip-to-chip
application note focuses on the Chip-to-module
electrical portions of key standards Copper cable <7m
that govern the much higher data OIF CEI 25G-LR N x 19.6-28.05 Gb/s Chip-to-chip
rates. Please refer to other Keysight Chip-to-module <650mm
application notes that provide extensive OIF CEI 28G-SR N x 19.6-28.05 Gb/s Chip-to-chip <300mm
coverage of optical measurements and OIF CEI 28G-VSR N x 19.6-28.05 Gb/s Module PCB trace >50mm
standards at lower rates. Host PCB trace >100mm
Fibre Channel 16X 14.025 Gb/s Cable <5m
Devices within the overall system Module PCB trace
include chips, modules, backplanes Host PCB trace
and cables. Table 1 summarizes the 32X 28.05 Gb/s
applicable standards, corresponding InfiniBand 10 x 10.3125 Gb/s Cable <20m
data rates, common devices and typical 12 x 10.5 Gb/s Host PCB trace
transmission distances. 4 x 25 Gb/s
SFF-8431 1 x 10 Gb/s Host board trace <300mm
Each standard uses a different set
of parameters to characterize the Table 1. High speed standards operating at data rates from 10 Gb/s to 28 Gb/s
transmitters, driven by differences in
network requirements and data rates.
Parameters like output voltage and
rise/fall times are common to nearly
all standards and are mandatory to
verify that a transmitter complies with
a given standard. Other parameters are
found only in a few standards, and may
be mandatory or optional (informative).
This application note provides deeper
insights into the parameters and how
to effectively and quickly measure each
of the common parameters, by both
manual control and automatic control.
3
Typical Devices and Topologies
Several new semiconductor integrated
circuits on the market today include
input-output (I/O) ports that operate
at rates from a few to 28 Gb/s, with
emerging standards pushing data rates
even higher. The IC's occupy less board
space and often use lower power for
new designs. Other designs utilize
lower cost components and generate
high bit rate signals through the use of
discrete circuits such as multiplexers.
System block diagrams then depend
Figure 1a. Example block diagram of high data rate transmitters for 4 x 25 Gb/s
on having full rate data streams only
over very short distances, or just prior
to entering the optical portion of the
network such as through modulators.
Many developers use application
specific integrated circuits (ASIC's)
within their designs, which provide
greater flexibility when considering
design topologies and troubleshooting.
A common use of ASIC's is for
multiplexers, which combine multiple Figure 1b. Example block diagram of high data rate transmitters for 100 Gb/s
data streams into fewer data streams,
or fewer into multiple data streams;
these topologies are often called
"gearboxes". One example is to design
the source data streams at 10 Gb/s,
then multiplex ten data streams to four
25 Gb/s streams as shown in Figure
1. These four streams can be used to
directly modulate four wavelengths on
the fiber or be further multiplexed into
one stream at 100 Gb/s as conceived
in emerging architectures.
With increasingly more complex
systems being developed, designers
need to characterize sub-assemblies
to verify proper operation before use
in the full system. In order to validate
a reference design, and to facilitate
accurate waveform performance,
designers make use of test fixtures
such as shown in Figure 2 to connect Figure 2. Typical test fixtures used to characterize performance of integrated circuit I/O
to the device under test (DUT) through
coaxial connectors.
4
Choosing the Optimal Test Solution
Designers are faced with several
key requirements when making
measurements on high data rate
devices: