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_ LP140WH1-TPD1-411
1.
140" HD COLOR TFT(Thin Film Transistor) LCD MODULE LP140D1-TPD1-411
Model .
LP140D1-TPD1-411 TFT-LCD Panel, Drive IC, Controller Back-Light ,
Block Diagram .



EEPROM Block
EEPROM Block 1 1366
for Tcon & EDID
for Tcon & EDID
User connector




TFT-LCD Panel
Timing Control
Timing Control (WXGA, GIP, TN)
eDP (Tcon) Block
(Tcon) Block
Min
i-LV 768
DVCC TCLKs D S
40
DVCC, AVDD
Pin




Power Source Driver
Power VGH, VGL, GMA
VCC (Bottom Bent)
Block
Block GIP CLKs, DSC

VLED VOUT_LED
LED_EN
LED Driver
LED Driver FB1~6
LED Backlight Ass'y
PWM / Block
SMBUS Block


Control & Data Power EDID signal & Power




2.



1) : 14.0"
2) : 309.399(H) 173.952(V) [mm]
3) : 1366 RGB 768 pixels, RGB stripe arrangement
4) : 226.5(H) 226.5(V) [ ]
5) : 323.5(H, typ) 192.0(V, typ) 5.2(D,max) [mm]
6) : Transmissive & Normally white
7) : 262,144 Colors ( 6 bit )
8) : 45/45/15/35o(CR ! 10 ) Typ.
9) : 6
10) : 3.3 [V]
11) : 350g(Max.)
12) : Anti-Glare
13) : LED
14) : eDP 1Lane
15) : Total 4.2 Watt(Typ..) @ LCM circuit 1.6 Watt(Typ..), B/L input 2.8 Watt(Typ.. with Driver)




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_ LP140WH1-TPD1-411
3.



TOP 0 +50 C
HST -20 +60 C
3-1
HOP 10 90 %RH
HST 10 90 %RH
VCC -0.3 4.0 V

VLED -0.3 22V V
3-2
ICC_P - 2000 mA

ILED_P - 1500 mA

3-1. .
, 39 ,
.
90% 80%

60 60%


Wet Bulb 50
Humidity[(%)RH]

Temperature [ ]
40 40%

30
20
20%
10 Storage
0
10%

Operation
-20 0 10 20 30 40 50 60 70 80


Dry Bulb Temperature [ ]


3-2. LCM Power On Connector
IC EOS Damage Fuse Open .




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_ LP140WH1-TPD1-411

4. Connector

4-1. CN1 (Interface Connections)
: Interface User Connector Pin
30pin, 0.5pitch Connector eDP VESA


Pin Symbol Description Notes
1 NC No Connection (Reserved)
2 H_GND High Speed (Main Link) Ground
3 1, Interface chips
NC No Connection (Reserved)
1.1 LCD : TBD (LCD Controller)
4 NC No Connection (Reserved) including eDP Receiver
1.2 System : TBD
5 H_GND High Speed (Main Link) Ground or equivalent
6 ML0- Complement Signal-Lane 0 * Pin to Pin compatible with eDP

7 ML0+ True Signal-Main Lane 0 2. Connector
2.1 LCD : CABLINE-VS RECE ASS'Y, I-PEX
8 H_GND High Speed (Main Link) Ground
or its compatibles
9 AUX+ True Signal-Auxiliary Channel 2.2 Mating : CABLINE-VS PLUG CABLE
ASS'Y or equivalent.
10 AUX- Complement Signal-Auxiliary Channel 2.3 Connector pin arrangement
11 H_GND High Speed (Main Link) Ground
12 VCC VCC for Module (3.3V)
13 VCC VCC for Module (3.3V)
14 BIST Built-In Self Test (active high)
[LCD Module Rear View]
15 GND Ground
16 GND Ground
17 HPD HPD signal pin
18 BL_GND BL Ground
19 BL_GND BL Ground
20 BL_GND BL Ground
21 BL_GND BL Ground

22 BL On/Off (On: 3.0~3.3V, Off: 0~0.5V) / NC (100K pull-
BL_EN
up) / 5V tolerant

23 PWM for luminance control (200~1KHz, 3.3V, 6~100%,
BL_PWM
0V=off) 5V tolerant
24 NC No Connection (Reserved)
25 NC No Connection (Reserved)
26 VBL BL Power 7V-20V
27 VBL BL Power 7V-20V
28 VBL BL Power 7V-20V
29 VBL BL Power 7V-20V
30 NC No Connection (Reserved)




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_ LP140WH1-TPD1-411

4-2. CN2 (LED Backlight Connections)
: LED Backlight Assy FPC Connector Pin
Hirose, TF12-9S-0.5H 9pin, 0.5pitch , 6string LED Array

Pin Symbol Description Notes
1 VOUT_LED LED Anode(Positive)
2 VOUT_LED LED Anode(Positive)
3 NC No Connection
4 FB1 LED Cathode (Negative)
5 FB2 LED Cathode (Negative)
6 FB3 LED Cathode (Negative)

7 FB4 LED Cathode (Negative)
8 FB5 LED Cathode (Negative)
9 FB6 LED Cathode (Negative)




5. LCM
5-1. T-con EEPROM
: T-con Tcon EEPROM Data
Writing PCB
/ 7 Tcon EEPROM Data .




PCB Ass'y
VCC SCL SDA GND

Tcon
CN1
1 30



VCC : 3.0V~3.6V ( Vcc )
SCL : I2C Clock
SDA : I2C Data
GND : Ground




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_ LP140WH1-TPD1-411

5-2. P-vcom

2 Dot Inversion , Pattern,
Inversion .


P-vcom Writing




2. VDD
ZIG VCOM

1. VCC
3. SCL VCOM
SDA DCP



Ground LCM


* DCP : Digitally Controlled Potentiometer




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_ LP140WH1-TPD1-411

6.

6-1. : , Timing, T1 min, T12 min
:



LCM (VCC)
VCC 3.0 3.3 3.6 V
Mosaic (Buyer Spec.) ICC
Black (Max Rating) ICC_max
PCC 6-1-3
ICC_P 6-1-4
LED (VLED)
VLED 7.0 12.0 20.0 V
ILED -
6-1-5
PLED
ILED_P - - 1500 mA 6-1-4
5 - 100 %
ZPWM 20 40 60 k
FPWM 200 - 1000 Hz
PWM
Duty (Jitter) - 0 0.2 Hz
High Level VPWM_H 3.0 - 5.3 V
Low Level VPWM_L 0 - 0.4 V
ZPWM 20 40 60 k 6-1-6
LED_EN High Level VLED_EN_H 3.0 - 5.3 V
Low Level VLED_EN_L 0 - 0.4 V
LED Backlight 15,000 - - Hrs
6-1-1. LED Driver
6-1-2.


6-1-3.
= X Buyer Spec.
= X Buyer Spec.
6-1-4. Pattern (Black)


6-1-5. LED LED Rank Max
LCM .
= LED Rank Max X LED Current X LED / LED Driver
= /
6-1-6. LED Driver .




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_ LP140WH1-TPD1-411

6-2.
eDP Interface , Timing
Note: eDP Model have to setting TMDS input dual mode.
ITEM Symbol Min Typ Max Unit Note
DCLK Frequency fCLK 68.7 72.0 76.2 MHz
Period twHA 1470 1534 1586

Hsync Width tHP 23 32 40 tCLK
Active tWH 1366 1366 1366

Period twVA 779 790 801
Vsync
Width tVP 2 5 8 tHP
Active tWV 768 768 768

Horizontal back porch tHBP 72 84 124
tCLK
Data Horizontal front porch tHFP 8 52 52
Enable Vertical back porch tVBP 8 14 20
tHP
Vertical front porch tVFP 1 3 5


6-2-1. eDP DC




6-2-2. eDP AC




Range is nominal 350ppm.
DisplayPort Link Rx does not
require local crystal for link
Unit Interval for high bit
rate UI_Low_Rate clock generation
(1.62Gbps/lane)
V Rx-SKEW-
Lane-to-Lane skew
INTER_PAIR

V Rx-SKEW- For high bit rate
Lane intra-pair skew
INTRA_PAIR For reduced bit rate




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_ LP140WH1-TPD1-411

6-3.
TFT-LCD LED Backlight , VESA .

3.3V
90% 90%
Power Supply Input T1
VCC
0V 10% 10%
T2 T7
T6
HPD Out from LCM 0V
HPD Valid Channel Operational Data
Vcm
Timing
Aux Channel Data Input 0V
Link
AUX