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INTEGRATED CIRCUITS
DATA SHEET
TDA8718 8-bit high-speed analog-to-digital converter
Product specification Supersedes data of April 1993 File under Integrated Circuits, IC02 June 1994
Philips Semiconductors
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
FEATURES · 8-bit resolution · Sampling rate up to 600 MHz · ECL (100K family) compatible for digital inputs and outputs · Overflow/Underflow output · 50 load drive capability · Low input capacitance (5 pF typ.). APPLICATIONS · High speed analog-to-digital conversion · Industrial instrumentation · Data communication · RF communication. QUICK REFERENCE DATA Measured over full voltage and temperature ranges, unless otherwise specified. SYMBOL VEEA VEED Iref IEEA IEED IEEO(L) IEEO(H) ILE DLE EB PARAMETER analog supply voltage digital supply voltage resistive ladder current analog supply current digital supply current LOW level output supply current HIGH level output supply current DC integral linearity error DC differential linearity error effective bits fi = 4.43 MHz; Iref = 45 mA; fclk = 100 MHz fi = 4.43 MHz; Iref = 45 mA; fclk = 100 MHz fclk(max) Ptot maximum clock frequency total power dissipation RL = 50 RL = 50 R = 48 CONDITIONS MIN. -4.2 -4.2 30 30 100 40 155 - - - - 600 - TYP. -4.5 -4.5 45 42 120 70 170 ±0.7 ±0.3 7.5 6.5 - 990 GENERAL DESCRIPTION
TDA8718
The TDA8718 is an 8-bit analog-to-digital converter (ADC) designed for professional applications. The device converts the analog input signal into 8-bit binary coded digital words at a sampling rate of 600 MHz. It has an effective bandwidth capability up to 150 MHz full-scale sine wave. All digital outputs are ECL compatible.
MAX. -4.8 -4.8 60 54 150 90 185 ±1.0 ±0.5 - - - 1250
UNIT V V mA mA mA mA mA LSB LSB bits bits MHz mW
ORDERING INFORMATION PACKAGE TYPE NUMBER PINS TDA8718K 28 PIN POSITION PLCC28 MATERIAL plastic CODE SOT261-2
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
BLOCK DIAGRAM
TDA8718
handbook, full pagewidth
analog negative supply voltage V EEA 28 CLK 9
clock inputs
digital negative supply voltage CLK 8 VEED 23
TDA8718
18 OGND2 6 OF 10 D7 output ground overflow output MSB
reference V RM voltage middle reference VRT voltage TOP
2 5
CLOCK DRIVER
8 VI RESISTOR LADDER 3 32 8 & ANALOG SIGNAL PROCESSING
13 D6 INPUT AND OUTPUT LATCHES ECL OUTPUTS & DIGITAL DECODING 14 D5 15 D4 16 D3 17 D2 19 D1 20 D0
analog voltage input
data outputs
LSB
V RB reference voltage BOTTOM
1 27 AGND analog ground 24 DGND digital ground OGND1 12 11 V BB
21 UF
MBB854 - 2
underflow output
Fig.1 Block diagram.
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
PINNING SYMB OL VRB VRM VI n.c. VRT OF n.c. CLK CLK D7 VBB OGND1 D6 D5 D4 D3 D2 OGND2 D1 D0 UF n.c. VEED DGND n.c. n.c. AGND VEEA PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 DESCRIPTION reference voltage BOTTOM reference voltage MIDDLE decoupling analog input voltage not connected reference voltage TOP
n.c. 27 AGND 28 V EEA
TDA8718
V RM
not connected clock input complementary clock input digital output; bit 7 (MSB) ECL reference voltage output ground 1 (0 V) digital output; bit 6 digital output; bit 5 digital output; bit 4 digital output; bit 3 digital output; bit 2 output ground 2 (0 V) digital output; bit 1 digital output; bit 0 (LSB) underflow digital output not connected digital supply voltage (-4.5 V) digital ground not connected not connected analog ground analog supply voltage (-4.5 V)
V RT OF n.c. CLK CLK
5 6 7 8 9
26 n.c.
handbook, halfpage
4
VI
3
2
1
VRB
overflow digital output
25 n.c. 24 DGND 23 V EED
TDA8718
22 n.c. 21 UF 20 D0 19 D1
D7 10 V BB 11
OGND1 12
D6 13
D5 14
D4 15
D3 16
D2 17
OGND2 18
MBB850 - 2
Fig.2 Pin configuration.
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VEEA VEED VEE VI Vclk(p-p) PARAMETER analog supply voltage (pin 28) digital supply voltage (pin 23) supply voltage difference between VEEA and VEED input voltage (pin 3) clock input voltage difference between CLK and CLK pin 8 to pin 9 (peak-to-peak value) output current for each digital output storage temperature operating ambient temperature junction temperature referenced to AGND referenced to VEED; note 1 CONDITIONS MIN. -7.0 -7.0 -1.00 VEEA -
TDA8718
MAX. +0.3 +0.3 +1.0 0 2.0
UNIT V V V V V
IO Tstg Tamb Tj Note
- -55 0 -
30 +150 +70 +150
mA °C °C °C
1. The circuit has two clock inputs CLK and CLK. Sampling takes place on the falling edge of the clock input signal; CLK and CLK are two complementary signals. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 55 UNIT K/W
handbook, halfpage
0
MBB851
R th j-a (%)
10
20
30
40
50 0 200 400 600 800 airflow (LFPM) 1000
Test conditions: PCB (2.24 × 2.24 × 0.062 inches). LFPM = Linear Foot Per Minute.
Fig.3 Average effect of air flow on Rth j-a.
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8718
CHARACTERISTICS VEEA = -4.2 to -4.8 V; VEED = -4.2 to -4.8 V; VEEA to VEED = -0.1 to +0.1 V; AGND and DGND shorted together; Tamb = 0 to +70 °C; typical values measured at VEEA = -4.5 V, VEED = -4.5 V and Tamb = 25 °C; unless otherwise specified. SYMBOL Supply VEEA VEED IEEA IEED IEEO(L) IEEO(H) IRT VRB VRT RLAD TCRLAD VosB VosT Inputs CLK INPUT (PIN 8); CLK INPUT (PIN 9) VIL VIH IIL IIH RI CI Vclk(p-p) LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current input resistance input capacitance clock input voltage difference between CLK and CLK pin 8 to pin 9 (peak-to-peak value) Vclk = -1.8 V Vclk = -0.8 V fclk = 100 MHz fclk = 100 MHz - - - - - - - -1.8 -0.8 0 120 1.5 3.5 900 - - - - - - - V V µA µA k pF mV analog supply voltage (pin 28) digital supply voltage (pin 23) analog supply current (pin 28) digital supply current (pin 23) LOW level output supply current HIGH level output supply current RL = 50 RL = 50 R = 48 -4.2 -4.2 30 100 40 155 -4.5 -4.5 42 120 70 170 -4.8 -4.8 54 150 90 185 V V mA mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Reference voltages for the resistor ladder (see Table 1) reference current (pin 5) reference voltage BOTTOM (pin 1) reference voltage TOP (pin 5) resistor ladder temperature coefficient of the resistor ladder voltage offset BOTTOM voltage offset TOP note 1 note 1 30 - - - - - - 45 0 48 175 8 × IRT 8 × IRT 60 - - - - - mA V V M/K mV mV 48 × IRT -
ANALOG INPUT (PIN 3); NOTE 2 IIL IIH RI CI LOW level input current HIGH level input current input resistance input capacitance data output = 00 data output = FF 20 100 - - 40 200 10 5 80 400 - - µA µA k pF
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8718
SYMBOL Outputs (RL = 50 )
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DIGITAL 100K ECL OUTPUTS (D0 TO D7; OF; UF) VOL VOH VECL IOL IOH fclk(max) tr; tf LOW level output voltage HIGH level output voltage ECL reference voltage LOW level output current HIGH level output current Tamb = 25 °C Tamb = 25 °C - -1300 -1550 4 10 -1770 -1150 -1450 6 20 - - -1650 - -1350 8 25 - 750 mV mV mV mA mA
Switching characteristics maximum clock frequency (pins 8 and 9) rise and fall times fi = 100 MHz 600 - MHz ps
Analog signal processing (fclk = 500 MHz) HARMONICS (FULL SCALE) h1 h2 h3 ILE DLE AILE EB fundamental harmonics second harmonics third harmonics fi = 100 MHz fi = 100 MHz fi = 100 MHz - - - - - note 3 fi = 4.43 MHz, full scale; Iref = 45 mA; note 4; fclk = 100 MHz; Fig.5 fi = 100 MHz, full scale; Iref = 45 mA; note 4; fclk = 500 MHz; Fig.6 BER bit error rate fclk = 500 MHz; fi = 100 MHz; Vi = ±8 LSB at code 128; 50% clock duty cycle - - 0 -54 -50 ±0.7 ±0.3 ±0.9 7.5 - - - ±1.0 ±0.5 ±1.5 - dB dB dB
Transfer function DC integral linearity error DC differential linearity error AC integral linearity error effective bits LSB LSB LSB bits
-
6.5
-
bits
-
10-11
-
times/ samples
Timing (fclk = 500 MHz; RL = 50 ; CL = 5 pF) note 5 tds th td sampling delay output hold time output delay time - 400 - - 700 1300 300 - 1500 ps ps ps
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
Notes to the "Characteristics"
TDA8718
1. Voltage offset BOTTOM (VosB) is the difference between the analog input which produces data outputs equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 °C. Voltage offset TOP (VosT) is the difference between reference voltage TOP (VRT) and the analog input which produces data outputs equal to FF, at Tamb = 25 °C. 2. The analog input is not internally biased. It should be externally biased between VRT and VRB levels. 3. Full-scale sine wave; fi = 4.43 MHz; fclk = 100 MHz. 4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 4K acquisition points per period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB. 5. TDA8718 can only withstand one or two 100K ECL loads in order to work out timings at the maximum sampling frequency. It is recommended to minimize the printed circuit-board load by implementing the load device as close as possible to the TDA8718. Table 1 Output coding and input voltage (typical values; referenced to AGND. BINARY OUTPUT BITS STEP Underflow 0 1 . . . 254 255 Overflow VI < -40 × IRT -40 × IRT . . . . . -8 × IRT > -8 × IRT O/UF D5 1 0 0 . . . 0 0 1 0 0 0 . . . 1 1 1 . . 1 1 1 D4 0 0 0 D3 0 0 0 . . . 1 1 1 D2 0 0 0 . . . 1 1 1 D1 0 0 0 . . . 1 1 1 D0 0 0 1 . . . 0 1 1
handbook, full pagewidth
CLK
50 %
sample N
sample N + 1
sample N + 2
VI
t ds DATA OF/UF DATA N-2 DATA N-1 DATA N
th
DATA N+1
MSA666
50 %
Fig.4 Timing diagram.
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
TDA8718
handbook, full pagewidth
0
MBD879
amplitude (dB) 20
40
60
80
100
120 0 6.27 12.5 18.8 25.1 31.3 37.6 43.9 f (MHz) 50.2
Effective bits: 7.53; THD = -54.56 dB. Harmonic levels (dB): 2nd = -77.28; 3rd = -54.76; 4th = -71.43; 5th = -71.85; 6th = -105.50.
Fig.5 Fast Fourier Transform (fclk = 100 MHz; fi = 4.43 MHz).
handbook, full pagewidth
0
MBD880
amplitude (dB) 20
40
60
80
100
120 0 31.2 62.4 93.5 125.0 156.0 187.0 218.0 f (MHz) 249.0
Effective bits: 6.60; THD = -48.60 dB. Harmonic levels (dB): 2nd = -64.81; 3rd = -51.10; 4th = -65.05; 5th = -58.33; 6th = -54.07.
Fig.6 Fast Fourier Transform (fclk = 500 MHz; fi = 100 MHz). June 1994 9
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
APPLICATION INFORMATION
TDA8718
handbook, full pagewidth
V RM
VRB 22 nF
V EEA 22 nF
AGND 22 nF 22 nF n.c.
VI n.c. 4 VRT 22 nF OF 5 3 2 1 28 27
26 25 n.c.
6
24
DGND
n.c.
7
23 22 nF
V EED
CLK
8
TDA8718
22
n.c.
CLK D7
9
21 D0
UF
10
20
V BB
11 12 13 14 D5 15 D4 16 D3 17 D2 18 OGND1 D6
19
D1
OGND2
2 V
MBB852 - 2
Fig.7 Application diagram.
June 1994
10
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
PACKAGE OUTLINE
TDA8718
handbook, full pagewidth
12.57 12.32 11.58 11.43 seating plane
S 0.10 S
1.27 (24 x)
0.53 max
0.18 M
0.81 max 25 19
R 1.14 0.64
26 28 1 A 45 o 4
18
10.92 9.91
11.58 12.57 11.43 12.32 2.16 max
12
1.22 1.07
5
11
0.51 (3x) max
0.32 max 4.57 max
3.04 max 0.51 min detail A
MBC654
Dimensions in mm.
Fig.8 Plastic leaded chip carrier, 28-leads; SOT261-2.
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
SOLDERING Plastic leaded chip carriers BY WAVE During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 °C within 6 s. Typical dwell time is 4 s at 250 °C. A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. BY SOLDER PASTE REFLOW Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8718
applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 °C. REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING IRON OR PULSE-HEATED SOLDER TOOL) Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 °C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 °C. (Pulse-heated soldering is not recommended for SO packages.) For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
NOTES
TDA8718
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
NOTES
TDA8718
June 1994
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Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
NOTES
TDA8718
June 1994
15
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Printed in The Netherlands
533061/1500/04/pp16 Document order number: Date of release: June 1994 9397 734 40011
Philips Semiconductors