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MC34166, MC33166
Inverting Switching
Regulators - Step-Up/Down
3.0 A
The MC34166, MC33166 series are high performance fixed
frequency power switching regulators that contain the primary
functions required for dc-to-dc converters. This series was specifically
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designed to be incorporated in step-down and voltage-inverting
configurations with a minimum number of external components and MARKING
can also be used cost effectively in step-up applications. x = 3 or 4
DIAGRAMS
These devices consist of an internal temperature compensated A = Assembly Location
reference, fixed frequency oscillator with on-chip timing components, WL = Wafer Lot
latching pulse width modulator for single pulse metering, high gain Y = Year
error amplifier, and a high current output switch. WW = Work Week
Protective features consist of cycle-by-cycle current limiting, G = Pb-Free Package
undervoltage lockout, and thermal shutdown. Also included is a low
power standby mode that reduces power supply current to 36 mA. TO-220 MC
Features TH SUFFIX 3x166T
· Output Switch Current in Excess of 3.0 A CASE 314A AWLYWWG
· Fixed Frequency Oscillator (72 kHz) with On-Chip Timing 1
· Provides 5.05 V Output without External Resistor Divider 5
· Precision 2% Reference
· 0% to 95% Output Duty Cycle
· Cycle-by-Cycle Current Limiting
· Undervoltage Lockout with Hysteresis TO-220 MC
· Internal Thermal Shutdown TV SUFFIX 3x166T
1 AWLYWWG
· Operation from 7.5 V to 40 V CASE 314B
· Standby Mode Reduces Power Supply Current to 36 mA 5
· Economical 5-Lead TO-220 Package with Two Optional Leadforms
Heatsink surface connected to Pin 3
· Also Available in Surface Mount D2PAK Package
· Moisture Sensitivity Level (MSL) Equals 1
· Pb-Free Packages are Available
Vin
ILIMIT 4
TO-220 MC
T SUFFIX 3x166T
Oscillator CASE 314D AWLYWWG
S 1
Q
2
R 5
PWM Pin 1. Voltage Feedback Input
2. Switch Output
UVLO 3. Ground
4. Input Voltage/VCC
Thermal L 5. Compensation/Standby
Reference
D2PAK
D2T SUFFIX MC
EA 3x166T
1 1 CASE 936A
VO AWLYWWG
5.05 V/ 5
3.0 A Heatsink surface (shown as
terminal 6 in case outline 1 5
3 5
drawing) is connected to Pin 3
This device contains 143 active transistors.
Figure 1. Simplified Block Diagram ORDERING INFORMATION
(Step Down Application) See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2005 1 Publication Order Number:
September, 2019 - Rev. 7 MC34166/D
MC34166, MC33166
ORDERING INFORMATION
Operating
Device Temperature Range Package Shipping
MC33166D2T D2PAK - Surface Mount
MC33166D2TG D2PAK - Surface Mount 50 Units/Rail
(Pb-Free)
MC33166D2TR4 D2PAK - Surface Mount
MC33166D2TR4G D2PAK - Surface Mount 800 / Tape & Reel
(Pb-Free)
MC33166T TO-220 - Straight Lead
TA= -40° to +85°C
MC33166TG TO-220 - Straight Lead
(Pb-Free)
MC33166TH TO-220 - Horizontal Mount
MC33166THG TO-220 - Horizontal Mount
(Pb-Free)
50 Units/Rail
MC33166TV TO-220 - Vertical Mount
MC33166TVG TO-220 - Vertical Mount
(Pb-Free)
MC34166D2T D2PAK - Surface Mount
MC34166D2TG D2PAK - Surface Mount
(Pb-Free)
MC34166D2TR4 D2PAK - Surface Mount
MC34166D2TR4G D2PAK - Surface Mount 800 / Tape & Reel
(Pb-Free)
MC34166T TO-220 - Straight Lead
MC34166TG TA= 0° to +70°C TO-220 - Straight Lead
(Pb-Free)
MC34166TH TO-220 - Horizontal Mount
MC34166THG TO-220 - Horizontal Mount 50 Units/Rail
(Pb-Free)
MC34166TV TO-220 - Vertical Mount
MC34166TVG TO-220 - Vertical Mount
(Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Input Voltage VCC 40 V
Switch Output Voltage Range VO(switch) -1.5 to + Vin V
Voltage Feedback and Compensation Input Voltage Range VFB, VComp -1.0 to + 7.0 V
Power Dissipation
Case 314A, 314B and 314D (TA = +25°C) PD Internally Limited W
Thermal Resistance, Junction-to-Ambient qJA 65 °C/W
Thermal Resistance, Junction-to-Case qJC 5.0 °C/W
Case 936A (D2PAK) (TA = +25°C) PD Internally Limited W
Thermal Resistance, Junction-to-Ambient qJA 70 °C/W
Thermal Resistance, Junction-to-Case qJC 5.0 °C/W
Operating Junction Temperature TJ +150 °C
Operating Ambient Temperature (Note 2) MC34166 TA 0 to + 70 °C
MC33166 - 40 to + 85
Storage Temperature Range Tstg - 65 to +150 °C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL-STD-883, Method 3015.
Machine Model Method 200 V.
2. Tlow = 0°C for MC34166 Thigh = + 70°C for MC34166
= - 40°C for MC33166 = + 85°C for MC33166
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MC34166, MC33166
ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = +25°C, for min/max values TA is the operating ambient
temperature range that applies [Notes 3, 4], unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OSCILLATOR
Frequency (VCC = 7.5 V to 40 V) TA = +25°C fOSC 65 72 79 kHz
TA = Tlow to Thigh 62 - 81
ERROR AMPLIFIER
Voltage Feedback Input Threshold TA = +25°C VFB(th) 4.95 5.05 5.15 V
TA = Tlow to Thigh 4.85 - 5.2
Line Regulation (VCC = 7.5 V to 40 V, TA = +25°C) Regline - 0.03 0.078 %/V
Input Bias Current (VFB = VFB(th) + 0.15 V) IIB - 0.15 1.0 mA
Power Supply Rejection Ratio (VCC = 10 V to 20 V, f = 120 Hz) PSRR 60 80 - dB
Output Voltage Swing V
High State (ISource = 75 mA, VFB = 4.5 V) VOH 4.2 4.9 -
Low State (ISink = 0.4 mA, VFB = 5.5 V) VOL - 1.6 1.9
PWM COMPARATOR
Duty Cycle %
Maximum (VFB = 0 V) DC(max) 92 95 100
Minimum (VComp = 1.9 V) DC(min) 0 0 0
SWITCH OUTPUT
Output Voltage Source Saturation (VCC = 7.5 V, ISource = 3.0 A) Vsat - (VCC -1.5) (VCC -1.8) V
Off-State Leakage (VCC = 40 V, Pin 2 = GND) Isw(off) - 0 100 mA
Current Limit Threshold Ipk(switch) 3.3 4.3 6.0 A
Switching Times (VCC = 40 V, Ipk = 3.0 A, L = 375 mH, TA = +25°C) ns
Output Voltage Rise Time tr - 100 200
Output Voltage Fall Time tf - 50 100
UNDERVOLTAGE LOCKOUT
Startup Threshold (VCC Increasing, TA = +25°C) Vth(UVLO) 5.5 5.9 6.3 V
Hysteresis (VCC Decreasing, TA = +25°C) VH(UVLO) 0.6 0.9 1.2 V
TOTAL DEVICE
Power Supply Current (TA = +25°C ) ICC
Standby (VCC = 12 V, VComp < 0.15 V) - 36 100 mA
Operating (VCC = 40 V, Pin 1 = GND for maximum duty cycle) - 31 55 mA
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
4. Tlow = 0°C for MC34166 Thigh = + 70°C for MC34166
= - 40°C for MC33166 = + 85°C for MC33166
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MC34166, MC33166
5.25 100
V FB(th), VOLTAGE FEEDBACK INPUT THRESHOLD (V)
VCC = 12 V VFB(th) Max = 5.15 V
IIB, INPUT BIAS CURRENT (nA)
VCC = 12 V
5.17 80 VFB = VFB(th)
5.09 VFB(th) Typ = 5.05 V 60
5.01 40
VFB(th) Min = 4.95 V
4.93 20
4.85 0
- 55 - 25 0 25 50 75 100 125 - 55 - 25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C)
Figure 2. Voltage Feedback Input Threshold Figure 3. Voltage Feedback Input Bias
versus Temperature Current versus Temperature
100 0 2.0
Vsat , OUTPUT SATURATION VOLTAGE (V)
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
VCC = 12 V
VComp = 3.25 V
80 RL = 100 k 30 , EXCESS PHASE (DEGREES) 1.6
Gain TA = +25°C
60 60
1.2
40 90
Phase 0.8
20 120 VCC = 12 V
VFB = 5.5 V
0.4 TA = +25°C
0 150
- 20 180 0
10 100 1.0 k 10 k 100 k 1.0 M 10 M 0 0.4 0.8 1.2 1.6 2.0
f, FREQUENCY (Hz) ISink, OUTPUT SINK CURRENT (mA)
Figure 4. Error Amp Open Loop Gain and Figure 5. Error Amp Output Saturation
Phase versus Frequency versus Sink Current
f OSC , OSCILLATOR FREQUENCY CHANGE (%)
4.0 100
DC, SWITCH OUTPUT DUTY CYCLE (%)
VCC = 12 V VCC = 12 V
80 TA = +25°C
0
60
- 4.0
40
- 8.0
20
- 12 0
- 55 - 25 0 25 50 75 100 125 1.5 2.0 2.5 3.0 3.5 4.0 4.5
TA, AMBIENT TEMPERATURE (°C) VComp, COMPENSATION VOLTAGE (V)
Figure 6. Oscillator Frequency Change Figure 7. Switch Output Duty Cycle
versus Temperature versus Compensation Voltage
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MC34166, MC33166
0 0
Vsat , SWITCH OUTPUT SOURCE SATURATION (V)
VCC GND
Vsw, SWITCH OUTPUT VOLTAGE (V)
- 0.5 - 0.2 VCC = 12 V
TA = +25°C Pin 5 = 2.0 V
Pins 1, 3 = GND
-1.0 - 0.4 Pin 2 Driven Negative
Isw = 100 mA
-1.5 - 0.6
- 2.0 - 0.8 Isw = 10 mA
- 2.5 -1.0
- 3.0 -1.2
0 1.0 2.0 3.0 4.0 5.0 - 55 - 25 0 25 50 75 100 125
ISource, SWITCH OUTPUT SOURCE CURRENT (A) TA, AMBIENT TEMPERATURE (°C)
Figure 8. Switch Output Source Saturation Figure 9. Negative Switch Output Voltage
versus Source Current versus Temperature
I pk(switch) , CURRENT LIMIT THRESHOLD (A)
4.7 160
VCC = 12 V Pin 4 = VCC
Pins 1, 2, 3 = GND Pins 1, 3, 5 = GND
I CC, SUPPLY CURRENT ( A)
Pin 2 Open
4.5 120
TA = +25°C
4.3 80
4.1 40
3.9 0
- 55 - 25 0 25 50 75 100 125 0 10 20 30 40
TA, AMBIENT TEMPERATURE (°C) VCC, SUPPLY VOLTAGE (V)
Figure 10. Switch Output Current Limit Figure 11. Standby Supply Current
Threshold versus Temperature versus Supply Voltage
Vth(UVLO) , UNDERVOLTAGE LOCKOUT THRESHOLD (V)
6.5 40
Startup Threshold
I CC, SUPPLY CURRENT (mA)
6.0
VCC Increasing 30
5.5
Turn-Off Threshold 20
5.0 VCC Decreasing
Pin 4 = VCC
10 Pins 1, 3 = GND
4.5 Pins 2, 5 Open
TA = +25°C
4.0 0
- 55 - 25 0 25 50 75 100 125 0 10 20 30 40
TA, AMBIENT TEMPERATURE (°C) VCC, SUPPLY VOLTAGE (V)
Figure 12. Undervoltage Lockout Figure 13. Operating Supply Current
Threshold versus Temperature versus Supply Voltage
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MC34166, MC33166
Vin
Current
+ Sense 4
Input Voltage/VCC
Cin
Oscillator
CT S
Switch
Q Output
R
2
Pulse Width Undervoltage
Modulator PWM Latch Lockout
Thermal
Shutdown L
5.05 V
Reference
+
+ Voltage
Error Feedback
100 mA Amp Input
VO
1 R2 CO
120
GND 3 Compensation 5 CF RF
R1
Sink Only
=
Positive True Logic
Figure 14. MC34166 Representative Block Diagram
4.1 V
Timing Capacitor CT
Compensation
2.3 V
ON
Switch Output
OFF
Figure 15. Timing Diagram
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MC34166, MC33166
INTRODUCTION
The MC34166, MC33166 series are monolithic power input is biased to the internal 5.05 V reference and is not
switching regulators that are optimized for dc-to-dc pinned out. The reference has an accuracy of ± 2.0% at room
converter applications. These devices operate as fixed temperature. To provide 5.0 V at the load, the reference is
frequency, voltage mode regulators containing all the active programmed 50 mV above 5.0 V to compensate for a 1.0%
functions required to directly implement step-down and voltage drop in the cable and connector from the converter
voltage-inverting converters with a minimum number of output. If the converter design requires an output voltage
external components. They can also be used cost effectively greater than 5.05 V, resistor R1 must be added to form a
in step-up converter applications. Potential markets include divider network at the feedback input as shown in Figures 14
automotive, computer, industrial, and cost sensitive and 19. The equation for determining the output voltage with
consumer products. A description of each section of the the divider network is:
device is given below with the representative block diagram R2
Vout + 5.05 )1
shown in Figure 14. R1
External loop compensation is required for converter
Oscillator
stability. A simple low-pass filter is formed by connecting a
The oscillator frequency is internally programmed to
resistor (R2) from the regulated output to the inverting input,
72 kHz by capacitor CT and a trimmed current source. The
and a series resistor-capacitor (RF, CF) between Pins 1 and 5.
charge to discharge ratio is controlled to yield a 95%
The compensation network component values shown in each
maximum duty cycle at the Switch Output. During the
of the applications circuits were selected to provide stability
discharge of CT, the oscillator generates an internal blanking
over the tested operating conditions. The step-down converter
pulse that holds the inverting input of the AND gate high,
(Figure 19) is the easiest to compensate for stability. The
disabling the output switch transistor. The nominal oscillator
step-up (Figure 21) and voltage-inverting (Figure 23)
peak and valley thresholds are 4.1 V and 2.3 V respectively.
configurations operate as continuous conduction flyback
Pulse Width Modulator converters, and are more difficult to compensate. The simplest
The Pulse Width Modulator consists of a comparator with way to optimize the compensation network is to observe the
the oscillator ramp voltage applied to the noninverting input, response of the output voltage to a step load change, while
while the error amplifier output is applied into the inverting adjusting RF and CF for critical damping. The final circuit
input. Output switch conduction is initiated when CT is should be verified for stability under four boundary conditions.
discharged to the oscillator valley voltage. As CT charges to These conditions are minimum and maximum input voltages,
a voltage that exceeds the error amplifier output, the latch with minimum and maximum loads.
resets, terminating output transistor conduction for the By clamping the voltage on the error amplifier output
duration of the oscillator ramp-up period. This PWM/Latch (Pin 5) to less than 150 mV, the internal circuitry will be
combination prevents multiple output pulses during a given placed into a low power standby mode, reducing the power
oscillator clock cycle. Figures 7 and 15 illustrate the switch supply current to 36 mA with a 12 V supply voltage. Figure 11
output duty cycle versus the compensation voltage. illustrates the standby supply current versus supply voltage.
The Error Amplifier output has a 100 mA current source
Current Sense pullup that can be used to implement soft-start. Figure 18
The MC34166 series utilizes cycle-by-cycle current shows the current source charging capacitor CSS through a
limiting as a means of protecting the output switch transistor series diode. The diode disconnects CSS from the feedback
from overstress. Each on-cycle is treated as a separate loop when the 1.0 M resistor charges it above the operating
situation. Current limiting is implemented by monitoring the range of Pin 5.
output switch transistor current buildup during conduction, and
upon sensing an overcurrent condition, immediately turning Switch Output
off the switch for the duration of the oscillator ramp-up period. The output transistor is designed to switch a maximum of
The collector current is converted to a voltage by an internal 40 V, with a minimum peak collector current of 3.3 A. When
trimmed resistor and compared against a reference by the configured for step-down or voltage-inverting applications, as
Current Sense comparator. When the current limit threshold is in Figures 19 and 23, the inductor will forward bias the output
reached, the comparator resets the PWM latch. The current rectifier when the switch turns off. Rectifiers with a high
limit threshold is typically set at 4.3 A. Figure 10 illustrates forward voltage drop or long turn-on delay time should not be
switch output current limit threshold versus temperature. used. If the emitter is allowed to go sufficiently negative,
collector current will flow, causing additional device heating
Error Amplifier and Reference and reduced conversion efficiency. Figure 9 shows that by
A high gain Error Amplifier is provided with access to the clamping the emitter to 0.5 V, the collector current will be in
inverting input and output. This amplifier features a typical dc the range of 100 mA over temperature. A 1N5822 or
voltage gain of 80 dB, and a unity gain bandwidth of 600 kHz
with 70 degrees of phase margin (Figure 4). The noninverting
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MC34166, MC33166
equivalent Schottky barrier rectifier is recommended to fulfill Thermal Protection
these requirements. Internal Thermal Shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
Undervoltage Lockout temperature is exceeded. When activated, typically at 170°C,
An Undervoltage Lockout comparator has been the latch is forced into a `reset' state, disabling the output
incorporated to guarantee that the integrated circuit is fully switch. This feature is provided to prevent catastrophic
functional before the output stage is enabled. The internal failures from accidental device overheating. It is not
5.05 V reference is monitored by the comparator which intended to be used as a substitute for proper heatsinking.
enables the output stage when VCC exceeds 5.9 V. To prevent The MC34166 is contained in a 5-lead TO-220 type package.
erratic output switching as the threshold is crossed, 0.9 V of The tab of the package is common with the center pin (Pin 3)
hysteresis is provided. and is normally connected to ground.
DESIGN CONSIDERATIONS
Do not attempt to construct a converter on wire-wrap component layout is recommended. Capacitors CIN, CO, and
or plug-in prototype boards. Special care should be taken all feedback components should be placed as close to the IC
to separate ground paths from signal currents and ground as physically possible. It is also imperative that the Schottky
paths from load currents. All high current loops should be diode connected to the Switch Output be located as close to
kept as short as possible using heavy copper runs to minimize the IC as possible.
ringing and radiated EMI. For best operation, a tight
+
Error
100 mA Amp
+
Error 1
100 mA Amp 120
1 Compensation 5
120
R1
Compensation 5
R1
I = Standby Mode VShutdown = VZener + 0.7
Figure 16. Low Power Standby Circuit Figure 17. Over Voltage Shutdown Circuit
+
Error
100 mA Amp
1
120
Compensation 5
D2
D1 R1
Vin
Css
1.0 M
tSoft-Start 35,000 Css
Figure 18. Soft-Start Circuit
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MC34166, MC33166
Vin
12 V
+ ILIMIT 4
+ Cin
330
Oscillator
S
Q Q1
R
2 D1
PWM 1N5822
UVLO
Thermal L
190 mH
Reference
+
+
EA
R2
VO
1 6.8 k CO +
5.05 V/3.0 A
2200
3 5 CF RF
0.1 68 k
R1
Test Conditions Results
Line Regulation Vin = 8.0 V to 36 V, IO = 3.0 A 5.0 mV = ± 0.05%
Load Regulation Vin = 12 V, IO = 0.25 A to 3.0 A 2.0 mV = ± 0.02%
Output Ripple Vin = 12 V, IO = 3.0 A 10 mVpp
Short Circuit Current Vin = 12 V, RL = 0.1 W 4.3 A
Efficiency Vin = 12 V, IO = 3.0 A 82.8%
L = Coilcraft M1496-A or General Magnetics Technology GMT-0223, 42 turns of #16 AWG
on Magnetics Inc. 58350-A2 core. Heatsink = AAVID Engineering Inc. 5903B, or 5930B.
The Step-Down Converter application is shown in Figure 19. The output switch transistor Q1 interrupts the input voltage, generating a
squarewave at the LCO filter input. The filter averages the squarewaves, producing a dc output voltage that can be set to any level between
Vin and Vref by controlling the percent conduction time of Q1 to that of the total oscillator cycle time. If the converter design requires an output
voltage greater than 5.05 V, resistor R1 must be added to form a divider network at the feedback input.
Figure 19. Step-Down Converter
3.0
MC34166 STEP-DOWN
VO
- +
CO
Vin
+ - +
ÉÉÉÉÉ
1.9
R2
ÉÉÉÉÉ RF
CF
L
ÉÉÉÉÉ
D1
R1
Cin
+
ÉÉÉÉÉ
(Bottom View)
ÉÉÉÉÉ
ÉÉÉ (Top View)
Figure 20. Step-Down Converter Printed Circuit Board and Component Layout
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MC34166, MC33166
Vin
12 V
+ ILIMIT 4
+ Cin
330
Oscillator
S
Q1 D1
Q
1N5822
R
2
PWM L
UVLO 190 mH
*RG
D4 620
1N4148
Thermal Q2
Reference MTP3055EL
+ D3
+ 1N967A
EA D2
R2 1N5822
VO
1 6.8 k CO +
28 V/0.6 A
1000
3 5 CF RF
0.47 4.7 k R1
1.5 k
*Gate resistor RG, zener diode D3, and diode D4 are required only when Vin is greater than 20 V.
Test Conditions Results